If you're responsible for the design of low power, energy efficient electronic systems and SoCs, you need to have a power management strategy and you need to know as soon as possible if it will meet the demands of your product and its target applications.
How is virtual prototyping helping? The release of the new IEEE 1801-2015 UPF 3.0 standard is a big step forward. With UPF 3.0, system-level power modeling and analysis using power-aware virtual prototypes is enabling architects and system designers to define systems that yield the greatest benefit in terms of energy efficiency, months earlier, before hardware is available.
At the recent SNUG Silicon Valley event, Synopsys teamed up with Micron, a global supplier of high performance, low power memory technologies, to move the story ahead yet again. We presented a tutorial explaining the practical steps system designers can take to convert static spreadsheet-based power model information for DDR memories into dynamic UPF 3.0 power models that can be simulated together with their SoC architecture in Synopsys Platform Architect MCO, the industry's first architecture analysis tool to support UPF 3.0.
So how about the rest of the system? The purpose of today's newsletter article is to share the highlights of our SNUG tutorial's step-by-step approach, such that you can apply the same steps for your internal spreadsheet-based power models – and practical power management.