Power and Performance-Optimized Methodologies for Next-Generation Designs

TSMC, a leading semiconductor foundry, and Synopsys have successfully collaborated for decades to deliver mutual customers optimized solutions for TSMC’s wide range of process technologies from 180-nm to 3-nm FinFET. The collaboration provides designers with the industry's most comprehensive IP, EDA tools and design flows, including multi-die systems, on TSMC's advanced 7nm, 5nm and 3nm process technologies with support for TSMC 3DFabric™ technologies and the TSMC 3Dblox™ standard.


Key Benefits

Certified Digital & Custom Design Platforms
Design complex SoCs with greater confidence
Long-Standing Collaboration
20+ years of semiconductor evolution
Minimize IP Integration Risk
Synopsys DesignWare IP optimized for TSMC's most advanced process

Areas of Collaboration

<p>With the evolution of process technologies, TSMC and Synopsys have anticipated the design challenges for each new process technology generation and have identified new design implementation issues. To help designers work within increasing technical constraints and stricter product requirements, we are continuously working towards tool certification and technology for the latest nodes. We collaborate in advanced FinFET technology, enhanced <a href="/content/synopsys/en-us/implementation-and-signoff/signoff.html">timing and statistical design</a>, <a href="/content/synopsys/en-us/implementation-and-signoff/3dic-design.html">3DIC design</a> using <a href="https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/3DFabric.htm">3DFabric™</a>, <a href="/content/synopsys/en-us/implementation-and-signoff/ams-simulation.html">analog mixed signal</a>, and <a href="/content/synopsys/en-us/implementation-and-signoff/custom-design-platform.html">custom design</a>.</p>

Seamless Design Flows and Certified Design Tools

With the evolution of process technologies, TSMC and Synopsys have anticipated the design challenges for each new process technology generation and have identified new design implementation issues. To help designers work within increasing technical constraints and stricter product requirements, we are continuously working towards tool certification and technology for the latest nodes. We collaborate in advanced FinFET technology, enhanced timing and statistical design, multi-die systems using 3DFabric™, analog mixed signal, and custom design.

<p>For more than 20 years, Synopsys and TSMC have collaborated to deliver a high-quality Interface IP and Foundation IP portfolio for TSMC’s process technologies from 180-nm to 3-nm, targeting a range of applications including HPC, AI, automotive, and mobile. With the high-quality IP portfolio, designers can align their aggressive project schedule and design requirements, while optimizing PPA, bandwidth and latency. To meet the stringent reliability and operation requirements of ADAS SoCs, leading automotive OEMs, Tier 1s, and semiconductor providers have adopted Synopsys’ automotive-grade IP for TSMC processes. With the broad adoption of DesignWare IP and customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.</p>

Silicon-Proven IP for TSMC Processes

For more than 20 years, Synopsys and TSMC have collaborated to deliver a high-quality Interface IP and Foundation IP portfolio for TSMC’s process technologies from 180-nm to 3-nm, targeting a range of applications including HPC, AI, automotive, and mobile. With the high-quality IP portfolio, designers can align their aggressive project schedule and design requirements, while optimizing PPA, bandwidth and latency. To meet the stringent reliability and operation requirements of ADAS SoCs, leading automotive OEMs, Tier 1s, and semiconductor providers have adopted Synopsys’ automotive-grade IP for TSMC processes. With the broad adoption of DesignWare IP and customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.

<p>Synopsys design solutions are certified for TSMC’s Open Innovation Platform Virtual Design Environment (VDE) to run on Amazon Cloud (AWS), Microsoft Azure, and Google Cloud Platform (GCP). The combination of these industry-leading cloud platforms and Synopsys <a href="/content/synopsys/en-us/cloud/silicon-design.html">design tools for the cloud</a> enable system-on-chip (SoC) designs with easy hardware scaling to boost design implementation and signoff productivity. </p>

Cloud Solutions and OIP Virtual Design Environment

Synopsys design solutions are certified for TSMC’s Open Innovation Platform Virtual Design Environment (VDE) to run on Amazon Cloud (AWS), Microsoft Azure, and Google Cloud Platform (GCP). The combination of these industry-leading cloud platforms and Synopsys design tools for the cloud enable system-on-chip (SoC) designs with easy hardware scaling to boost design implementation and signoff productivity. 

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