Full-chip verification through process window
Proteus LRC (lithography rule check) is Synopsys' post-optical proximity correction (OPC) verification tool enabling fast and accurate hotspot detection across the process window for full-chip mask validation within the highly-scalable Proteus Pipeline Technology. Problem areas are quickly identified, enabling more robust design and OPC practices early in the development cycle while reducing the risk of device failure later during the production flow. Improve time to market for new technologies and increase yield for existing flows with Proteus LRC.
As lithography processes approach the resolution limits of existing toolsets, devices become more susceptible to failure due to increased variation through the process window and tighter tolerances associated with smaller design nodes. Proteus LRC provides fast comprehensive hotspot, two layer spacing and overlay, EPE, and CD control checking capabilities through the process window. Rigorous checking and analysis capabilities available within Proteus LRC enable identification of potential sources of yield loss before committing designs to manufacture, saving time and costly mask re-spins.
Proteus LRC delivers industry leading accuracy with process window-aware error detection and production-proven models for a reliable and comprehensive process verification solution. A fully customizable interface provides unparalleled flexibility, allowing users to incorporate their own algorithms without having to compromise their IP. The application is fully integrated into the Proteus Pipeline Technology and runs on standard x86 core processors for the best cost of ownership, while the advanced error analysis capabilities provide tools for the most efficient review and disposition of results.