Cloud native EDA tools & pre-optimized hardware platforms
Proteus ILT uses inverse imaging technology to resolve the most challenging optical proximity effects encountered on dense designs at leading technology nodes. Increasing design density due to semiconductor technology scaling provides little room for conventional segment-based OPC methodologies resulting in sub-optimal process windows. Proteus ILT significantly increases the degrees of correction freedom by approaching the problem from an inverse imaging perspective to identify the optimal mask shapes that are required to print the design intent. Proteus ILT provides several approaches that eliminate the segment-based correction constraints and enables the ideal placement of assist features and optimal main feature correction resulting in larger process windows and improved image fidelity while minimizing mask complexity and runtime.
Lithography patterning hardware improvements are advancing more slowly than the technology design nodes creating a wider gap between the fundamental resolution limits of the hardware and the features being printed on the mask. This is resulting in marginal process windows, higher correction complexity, and longer turnaround time. Proteus ILT addresses these process challenges with production-proven technology that was the first in the industry to pioneer the use of inverse lithography simulations for proximity correction. Today Proteus ILT is routinely used to increase the process window as shown in Figure 1 and maximize the sidewall angle for improved yield on the most challenging designs.