DesignWare® ARC® EM Safety Island IP is a family of pre-built, verified dual-core lockstep processors with integrated safety monitors that simplify development of safety-critical applications and accelerate ISO 26262 certification of automotive system-on-chips (SoCs). ASIL D ready EM4SI and EM5DSI are safety islands based on the EM4 or EM5D processor cores and are ideal for a broad range of automotive applications including advanced driver assistance systems (ADAS), radar, sensors and controllers. There is also an option to run the cores in an independent dual-core mode for ASIL B or non-automotive applications requiring higher performance based on the same design.
ARC EM processors integrate hardware to support parity for detection of single-bit errors and also ECC logic for data and address errors on closely coupled memories. Also, hardware stack protection is included to check overflow and underflow of reserved stack space. An integrated watchdog timer is available on ARC EM cores to help recover from a deadlock situation or to enable countermeasures in case of tampering.
Options to the ARC EM Safety Islands include a floating point unit, a microDMA, and a memory protection unit to help protect against malicious or misbehaving code in critical applications. The ability to tightly couple these features and options ensures they are instantiated in the main and shadow core for full redundancy
The ARC EM Safety Islands are supported by comprehensive safety documentation including FMEDA reports and the MetaWare Toolkit for Safety with ASIL D ready certified compiler to generate ISO 26262 compliant code.
ARC EM Safety Island Block Diagram
DesignWare ARC EM Safety Islands for Automotive Applications
Downloads and Documentation
- ARC EM safety islands support ISO 26262 automotive safety standards
- Includes hardware safety features: ECC, integrated user-programmable watchdog timer, and lockstep safety monitor
- Supports both ASIL D lockstep operation or ASIL B independent dual-core mode operation
- Performance and area-efficient cores with up to 1.81 DMIPS/MHz and 360 DMIPS/mm2
- Support for DSP instructions and unified multiply/MAC unit (EM5DSI)
- MetaWare Toolkit for Safety with ASIL D Ready certified compiler
- Extensive safety documentation eases SoC certification process