SNUG Austin 2015 Proceedings

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Complete Proceedings


User Papers and Presentations
FA2 User & Tutorial Session - Parallel DRC Cleanup Methodology, ARM Cortex-A72 Implementation in IC Compiler and IC Compiler II, Network-on-Chip Floorplanning
Parallel DRC Clean-Up Using IC Compiler and Custom Designer (Best Presentation - 1st Place)
Author(s): Nadeem Eleyan, Jeremy Bailey, Curtis Richardson, Patrick Szabo - Qualcomm; Kelly Burleson, Frank Gover - Synopsys
PaperTutorialSession Recording

FA3 Synopsys Verification - Improving Test Generation
Is Your Testing N-wise or Unwise? Pairwise and N-wise Patterns in SystemVerilog for Efficient Test Configuration and Stimulus
Author(s): Kevin Johnston, Jonathan Bromley - Verilab
PaperPresentationSession Recording

Performance of SystemVerilog Sudoku Solver with Synopsys VCS (Best Presentation - 2nd Place)
Author(s): Jeremy Ridgeway - Avago Technologies
PaperPresentationSession Recording

Verification of a Cache Coherent System with an A53 Cluster Using ACE VIP with Graph Based Stimulus
Author(s): Galen Blake, Perry Wobil - Altera Corporation
PaperPresentationSession Recording

FA4 Synopsys Verification - SoC Configurability, Coverage
A Vendor-Independent Formal Unreachability Analysis Flow for Automated Coverage Closure
Author(s): Xiushan Feng - NVIDIA; Abhishek Muchandikar, Sunil Keerthi, Praveen Tiwari - Synopsys
PaperPresentationSession Recording

Obtaining a Maximally Compressed Verification Test Set
Author(s): James Longino, Mrinal Bose - Samsung Austin R&D Center
PaperPresentationSession Recording

RTL-Agent Switch - Implementation and Applications
Author(s): Aman Arora, Nathan Wooster, Pavan Mula, Rob Porter - NVIDIA
PaperPresentationSession Recording

FA5 NanoTime for Memory; NanoTime for High Performance CPU; SiliconSmart POCV Accuracy & Performance
NanoTime and SPICE Accuracy Correlation in Advanced Nodes (Best Presentation - 3rd Place)
Author(s): Vibhor Mittal, David Newmark, Teja Singh, Sundar Rangarajan - Advanced Micro Devices
PaperPresentationSession Recording

SiliconSmart POCV Constraints - Correlation and Performance/Accuracy Exploration
Author(s): Harish Krishnan - Samsung Austin Design Center; Myles Prather - Synopsys
PaperPresentation

Transistor-Level Static Timing Analysis and Characterization of Embedded SRAM Using NanoTime for Memories
Author(s): Clint Parker - Hewlett-Packard; Charles Jiang - Synopsys
PaperPresentationSession Recording

FA7 Software Security
Secrets for Delivering Software - Faster and Cheaper
Author(s): Dhaval Shah - Synopsys

FB2 User & Tutorial Session - IC Compiler II GUI Walkthrough & IC Compiler II Marketing and R&D Update
IC Compiler II Update
Author(s): JC Lin, Stelios Diamantidis - Synopsys

FB3 User Session - Advanced UVM
Global Event Handling with UVM Custom Phasing
Author(s): Jeremy Ridgeway, Dolly Mehta - Avago Technologies
PaperPresentation

Using a Generic Plug and Play Performance Monitor for SoC Verification
Author(s): Dr. Ambar Sarkar, Bhavin Patel, Janak Patel, Kaushal Modi, Ajay Tiwari - eInfochips
PaperPresentationSession Recording

FB4 User & Tutorial Session - UVM Agents, Verdi Debug
Mastering Reactive Slaves in UVM (Technical Committee Award)
Author(s): Jeff Montesano, Mark Litterick - Verilab; Taruna Reddy - Independent
PaperPresentation

FB7 User & Tutorial Session - Systems/Prototyping/FPGA
SoC Development and Prototype with VDK
Author(s): Taylor Holmes, Andrew Passerelli, John Connor - Northrop Grumman Corporation
PaperPresentationSession Recording

FC3 User & Tutorial Session - Do More with VIP, VCS 2015.09
Tests Reusability and Portability - A Case Study on Reusing USB IP Level Test Suite at SoC
Author(s): Averroes Umatiya, Amol Bhinge,- Freescale Semiconductor; Karim Aoua - Synopsys
PaperPresentationSession Recording

FC4 Tutorial Session - Reducing Memory Footprint, Parameter Verification, Formal
Finding Incorrect Parameter Settings Early in the Development Phase Using Certitude
Author(s): Varun Ramesh, Amol Bhinge - Freescale Semiconductor; Jay Dutt - Synopsys
PaperPresentationSession Recording

Optimization Techniques to Improve Simulation Memory Performance
Author(s): Aditya Musunuri, Amol Bhinge- Freescale Semiconductor; Narayana Koduri - Synopsys
PaperPresentationSession Recording

FC7 User & Tutorial Session - Prototyping & Emulation
Pre-Silicon Stress Testing with Real World Network Traffic Using FPGA-Based Emulation
Author(s): Jaime Castano, Micky Kowlessar - Freescale Semiconductor
PaperPresentation

Keynote
Silicon to Software - Scale Complexity, Systemic Complexity, and Software Complexity
Author(s): Aart de Geus, Chairman and Co-CEO - Synopsys

Publication Only
Publish Only
A Solution for Enabling SHS-Based Functional Testing of Fuse Macro in SMS
Author(s): Umesh Chandra Parasar, Mudit Srivastava, Suresh Gubba - STMicroelectronics
Publish Only

Integration of Custom PCIe Application with Synopsys VIP
Author(s): Siddharth Krishna Kumar, Brent Vestal - Seagate Technology
Publish Only

Tutorials
FA1 Tutorial Session - Design Compiler Best Practices
Achieving Optimal Quality of Results Faster with Design Compiler
Author(s): Narendra Akilla - Synopsys
Tutorial

Using SystemVerilog with Design Compiler to Increase Productivity
Author(s): James Argraves - Synopsys
Tutorial

FA2 User & Tutorial Session - Parallel DRC Cleanup Methodology, ARM Cortex-A72 Implementation in IC Compiler and IC Compiler II, Network-on-Chip Floorplanning
High-Performance, Energy-Efficient Implementation of the ARM Cortex-A72 Processor
Author(s): Joe Walston - Synopsys
TutorialVideo

FA6 Tutorial Session - Test
Introduction to SpyGlass DFT ADV & Demo
Author(s): Al Joseph
TutorialVideo

Understanding Compression - Past, Present and Future
Author(s): Rohit Kapur - Synopsys
TutorialVideo

FB1 Panel & Tutorial Session - PrimeTime Best Practices for Signoff
Latest Advancements for Handling Local Variation Effects in Timing Analysis
Author(s): Ayhan Mutlu - Synopsys
TutorialVideo

FB2 User & Tutorial Session - IC Compiler II GUI Walkthrough & IC Compiler II Marketing and R&D Update
Getting Productive in the IC Compiler II GUI
Author(s): John Griner - Synopsys
TutorialVideo

FB4 User & Tutorial Session - UVM Agents, Verdi Debug
Verdi Debug Platform
Author(s): Brian Schneider - Synopsys
TutorialVideo

FB5 Tutorial Session - Improve Your Layout Productivity Using Custom Designer
Increase Your Layout Productivity for FinFET and Advanced Nodes Using Synopsys Custom Implementation Tools
Author(s): Maged Attia - Synopsys
TutorialVideo

FB6 Tutorial Session - Cell-Aware Test & Auto LBIST
Cell-Aware Test
Author(s): Glenn Boyer - Synopsys
TutorialVideo

Auto LBIST
Author(s): Kuba Smieciuszewski - Synopsys
TutorialVideo

FB7 User & Tutorial Session - Systems/Prototyping/FPGA
Optimize DDR Memory Subsystems for Performance, Power, and Cost
Author(s): Asheesh Khare - Synopsys
Tutorial

FC1 User & Tutorial Session - Low-Power Verification & ARM Processor Synthesis
Complete Low Power Verification Using Formality
Author(s): Bob Hatt - Synopsys
TutorialVideo

High-Performance, Energy-Efficient Implementation of the ARM Cortex-A72 Processor Using Synopsys Design Compiler Graphical RTL Synthesis Solution
Author(s): Joe Walston - Synopsys
TutorialVideo

Low Power Static Checking - A Deeper Look at Debugging
Author(s): Tushar Parikh - Synopsys
TutorialVideo

FC2 Tutorial Session - ARM A53 Reference Implementation, IC Compiler II Design Planning
ARM Cortex-A53 Multi-Core Network Computing Reference Implementation on Samsung 14LPP FinFET Process
Author(s): Chad Gamble - Synopsys
TutorialVideo

FC3 User & Tutorial Session - Do More with VIP, VCS 2015.09
Utilizing VIP Test Suites
Author(s): Paul Graykowski - Synopsys
TutorialVideo

VCS 2015.09 Update
Author(s): Tom Powell - Synopsys
TutorialVideo

FC5 Tutorial Session - Improve your Design Productivity Using Synopsys AMS Tools
Accelerate Simulation, Analysis, and Debugging of Complex IC Designs Using Synopsys AMS Tools
Author(s): Helene Thibieroz - Synopsys
TutorialVideo

Mixed-Signal SoC Designs Using VCS AMS Performance and Capabilities
Author(s): Helene Thibieroz - Synopsys
TutorialVideo

FC6 Tutorial Session - DFTMAX & TetraMAX Updates
DFTMAX and TetraMAX 2015.06 Updates
Author(s): Kuba Smieciuszewski - Synopsys
TutorialVideo

FC7 User & Tutorial Session - Prototyping & Emulation
Multi-FPGA Prototyping of Over 1.5 Billion ASIC Gates
Author(s): Troy Scott - Synopsys
TutorialVideo

ZeBu-VCS Unified Compile Flow
Author(s): Gene Stuckey - Synopsys

Panel Presentation
FB1 Panel & Tutorial Session - PrimeTime Best Practices for Signoff
Panel - Signoff Timing Closure: Build or Buy?
Author(s): Mahesh Sharma - Advanced Micro Devices; Nahmsuk Oh - Synopsys
Tutorial

User Presentation
FA2 User & Tutorial Session - Parallel DRC Cleanup Methodology, ARM Cortex-A72 Implementation in IC Compiler and IC Compiler II, Network-on-Chip Floorplanning
The Rubber Jigsaw Puzzle - Floorplanning for Network-on-Chip
Author(s): Jonah Probell, Byungchul Hong, Brian Huang - Arteris
TutorialVideo

FC4 Tutorial Session - Reducing Memory Footprint, Parameter Verification, Formal
Is End-to-End Formal Test Bench Complete?
Author(s): Prashant Aggarwal - OSKI; Anders Nordstrom- Synopsys
TutorialVideo
Silicon Valley 2017 Keynote