How to Build a Chip for Functional Safety Applications | Synopsys

How to Build a Chip for Functional Safety Applications

Watch Stewart Williams, senior automotive vertical marketing manager at Synopsys, and Ed Sperling, editor in chief of Semiconductor Engineering, discuss a comprehensive automotive workflow that enables designers to prove at the planning and implementation phases that their SoC safety architecture can achieve target ASILs. In this video, Stewart and Ed also discuss:

  • The consolidation of chips in vehicles
  • The impact 7/5nm is having on automotive SoC designs
  • The trade-offs between power, performance, area, and reliability
  • How ISO 26262 is impacting those variables


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How Can Synopsys Help You Ensure Functional Safety

Synopsys’ comprehensive automotive design solutions deliver complex functional safety (FuSa) analysis, implementation, and verification capabilities. Our unified functional safety verification platform is a complete solution that brings together best-in-class technologies for FMEA, FMEDA and fault campaign management under a single unified flow. Synopsys’ native automotive solutions provide the industry’s most comprehensive feature set to efficiently implement and verify FuSa mechanisms.

Synopsys also provides complete solutions to address reliability challenges, including electromigration (EM), voltage (IR) drop, device aging, and robust redundant via insertion (RVI) capabilities.

Our tools are certified to ISO 26262 Tool Confidence Level (TCL) 1 to accelerate quality and functional safety qualification.


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