HAPS-80 Prototyping Solution

Deliver Prototypes of ASIC and SoC Designs in Under Two Weeks

Prototypes for ASIC IP and SoC design are the most reliable and affordable way to confirm that new designs are compliant with a particular specification or standard but will also satisfy your customer needs. Synopsys’ HAPS® (High-Performance ASIC Prototyping System) prototyping systems have been designed to deliver maximum system performance and easy integration with physical interfaces, and do so in as short time as possible.

Synopsys HAPS ProtoCompiler software, which has built in knowledge of the HAPS system architecture, automates partitioning and enables an average time to first prototype of less than two weeks and subsequent compile iterations in hours compared to non-integrated prototypes.

HAPS-80 Prototypes and features in a flow chart


Resource Management

Enables prototype engineers to reduce their support burden by delivering fully packaged prototypes to their end users. Learn more here. 


A combination of extensive testing and strict product release criteria helps ensure that HAPS users enjoy the benefits of high availability, reliability, and functional consistency across units.

High Performance

Performance is what has made HAPS prototyping the industry leader for a range of validation scenarios from independent IP blocks to full systems that integrate CPU subsystems.

Scalable Capacity

A modular hardware architecture along with the latest high-capacity FPGA technology allows for HAPS-80 systems to scale from 26 million to over 1.6 billion ASIC gates.

Observability and Controllability

Seamless signal capture across FPGAs and a spectrum of data storage options allow wide access and control with minimal impact to prototyping resources and partition plans.

Easy Bring-Up

IP and ASIC RTL migration technology from the industry's leading EDA vendor reduces your effort to deliver high-performance prototypes.

Connectivity Options

The benefits of stand-alone FPGA-based prototypes are clear, but workstation connectivity for HAPS-80 eases migration from a simulation environment and enable a hybrid system that integrates SystemC/TLM models for the fastest SoC prototype bring-up ever.