Mode-Division Multiplexing for Silicon Photonic Network-on-Chip

The Solution

With a flexible and integrated environment focused on manufacturable designs, OptoDesigner [3] enables efficient, high-quality PIC device development. The Key capabilities include: Photonic chip and mask layout, advanced connectors and autorouting, simulation modules and Photonic design verification. OptoDesigner has the most comprehensive photonic foundry support in the industry, with more than 30 Process Design Kits (PDKs) available from foundries around the world for photonic processes such as silicon, silicon nitride, indium phosphide, polymers, and silica on glass. OptoDesigner has enabled more than 500 tapeouts (including commercial designs) over the last three years. The IMEC PDK is a plug-in library for OptoDesigner and supports the Multi Project Wafer runs provided by imec. In addition to the photonic elements from the standard OptoDesigner library, the PDK contains technology specific information like mask layer names, design rules, validated building blocks, die sizes and GDS file settings. 

The Result

The schematic of the demonstration network reported in this paper using two microring modulators, two germanium photodetectors (Ge PDs) and an MDM link is shown in Fig. 1(a). In this optical link, a single continuous-wave (CW) laser acts as the light source. The laser is coupled to the waveguide via a shallow-etched focusing grating coupler. Two separate silicon microring modulators encode the electrical orthogonal frequency-division multiplexing (OFDM) signal onto different optical modes of the waveguide. The modulated signals in the single-mode access waveguides are converted to different high order modes in the multimode bus waveguide using cascaded asymmetric directional couplers (ADCs). In the ADC, the signal encoded on the fundamental mode of the access waveguide can be evanescently coupled to the higher order mode of the multimode bus waveguide. 

The mask design in OptoDesigner is shown in Figure 2 (a) and the corresponding gds is shown in Figure 2(b). As we can see, the mask includes not only the circuit mentioned above but also individual structures for test purpose and circuits for other topics. We easily fitted all the structures into IMEC die and made the necessary modification. Since OptoDesigner is script driven, for-loops with parameter changes were used to create the identical test structures. 

The MDM monolithically integrated circuits were fabricated by IMEC. Microscope images of the 2-channel MDM on-chip communication link is shown on figure 1(b). There is good agreement between the circuit and fabricated chip.

Figure. 3(a) and (b) show the measured BERs at different data rate for the two mode channels, respectively. Using 20% coding overhead for hard-decision forward error correction (HD-FEC) [36], which has a BER threshold of 1.5 × 10⁻², the TE₀ channel can achieve a data rate of ∼128 Gb/s with >105 Gb/s net information rate and TE₁ channel can achieve ∼120 Gb/s with ∼100 Gb/s net information rate. At 7% overhead HD-FEC, which has a BER threshold of 3.8 × 10⁻³, 100 Gb/s aggregate data rate could be achieved for both channels with 84 Gb/s net information rate.