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DesignWare IP for 5G Mobile Phones
5G is significantly increasing data throughput for mobile phones, driving the need for highly efficient processing solutions, analog front ends (AFEs) that deliver GHz channel bandwidth, interface IP that enables high-speed chip-to-chip communications, and security solutions to protect the sensitive data we carry on our phones.
Synopsys offers the industry’s broadest portfolio of interface IP, data converter IP, security IP, and a range of processor solutions for 5G mobile phones.
Mouse over or tap to learn more about DesignWare IP solutions:
ARC EV6x
- Wide SIMD/VLIW processor with ISA optimized for communications algorithms and machine learning
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LPDDR
- DDR PHY Compiler optimizes DDR IP configuration
- Supports auto disable of buffers, receivers & drivers to reduce power
- Supports x16 and x32 SDRAMs
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MIPI
- Compliant to MIPI CSI-2 specification rev 1.2 with integrated video pattern generator
- 64-bit Image Data Interface for reduced power
- Support for multiple Image Pixel Interfaces to merge multiple streams.
- Supports 1 to 8 Rx data lanes with D-PHY PPI interface
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Bluetooth LE
- Link Layer and PHY
- Operates below one volt supply
- Integrated security functions
- Supports the latest Bluetooth low energy standard
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Advanced Peripherals SPI, I2C, UART
- Functions for on-chip and off-chip connectivity
- Synthesizable to meet specific design requirements
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Audio IP Subsystem
- Includes audio processor, audio codecs, standard digital interfaces, and a complete, ready-to-use software environment that support the latest formats from Dolby, DTS and SRS
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Data Fusion Subsystem
- ARC EMxD for battery-operated devices requiring RISC & DSP processing
- Data Fusion Subsystem for sensor fusion & always-on audio, voice, image processing
- Support for tightly coupled digital and analog sensors
- Support for tightly coupled multi-time programmable NVM
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USB
- Addresses all video markets in mobile, digital TV, set top box, cameras and more for image super resolution.
- Supports audio bursting, lowering power consumption for microphone & speaker connectivity for AI
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UFS Host Controller
- Low power, small area, low latency
- Supports embedded and removable storage
- Inline encryption for data and privacy protection
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Security / HSM
- Hardware Security Modules are standard components for mobile chipsets as the trend for embedded / integrated SIM capabilities are implemented.
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I3C
- Compliant with the latest MIPI I3C specification
- Backward compatible with the I2C child devices
- Supports all data rates up to 26.7 Mbps
- In-band interrupts within the 2-wire interface
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5G NR UE Processing
- ASIP Tool - Deploys task-optimized processing solutions with hardware parallelism & custom datapaths while retaining programmability
- ARC HSxD - Combined CPU+DSP architecture and multicore control operations
- ARC EV6x - Wide SIMD/VLIW processor with ISA optimized for communications algorithms and machine learning
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PCIe Controller and PHY
- High-performance, multi-channel PCIe PHY supporting PCIe 4.0, 3.1, 2.1, 1.1
- Configurable PCIe controller supporting PCIe 4.0, 3.1, 2.1, 1.1
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Analog Front End
- Delivers GHz channel bandwidth, high QAM, low BOM cost, direct RF conversion with hundreds of implementations
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Analog Front End
- Delivers GHz channel bandwidth, high QAM, low BOM cost, direct RF conversion with hundreds of implementations
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HDMI
- HDMI 2.1 features for immersive viewing with uncompressed 8k and dynamic HDR
- HDCP for content protection and DSC for visual lossless compression
- Compliant with HDMI 2.1, 2.0 and 1.4 specification
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ASIP
- Application-specific instruction set processors for specialized processing and greater computational efficiencies
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Highlights
- Analog front-end delivers GHz channel bandwidth, high QAM, low BOM cost, direct RF conversion with hundreds of implementations
- ASIP Designer deploys task-optimized processing solutions with hardware parallelism & custom datapaths while retaining programmability for 5G baseband processing
- ARC HS4xD offers combined CPU+DSP architecture and multicore control operations, as well as efficient interfacing to hardware accelerators
- ARC VPX is a wide SIMD/VLIW processor with ISA optimized for communications algorithms and machine learning
- tRoot™ Hardware Security Modules for iSIM deliver secure mobile connectivity to cellular IoT. Security protocol accelerators provide efficient encryption and authentication for 5G/LTE algorithms. True random number generators and other cryptography cores enable designers to build their own solutions.
- Support for the latest LPDDR4/4x and future LPDDR5 standards enable the lowest interface voltages for low power AI inference
- Compliant to MIPI CSI-2 specification rev 1.2 with integrated video pattern generator, 64-bit Image Data Interface for reduced power, and support for multiple Image Pixel Interfaces to merge multiple streams. Supports 1 to 8 Rx data lanes with D-PHY PPI interface
- MIPI D-PHY enables direct CMOS image sensor connectivity, supports the latest 1.2 specification, and available in FinFET technologies
- MIPI I3C addresses the challenge of integrating multiple sensors for context awareness or other machine learning applications. Backward compatible with the I2C target IP devices with data rates up to 33.4 Mbps, and dynamic address allocation
- USB-C / DisplayPort with HDCP 2.3 Content Protection addresses all video markets in mobile, digital TV, set top box, cameras and more for image super resolution. Supports audio bursting, lowering power consumption for microphone & speaker connectivity for AI.
- Compliant with the latest HDMI 2.1 specification with HDCP 2.3 Content Protection
- Bluetooth LE supports down to one-volt operation for extended battery life. Features on-chip transceiver matching network, which reduces the cost of external components and simplifies board design
- ARC SoundWave Audio Subsystem includes audio processor, audio codecs, standard digital interfaces, and a complete, ready-to-use software environment that support the latest formats from Dolby, DTS and SRS