Synopsys’ Full-Stack Silicon-to-Systems Solutions Empower Core Automotive Computing and Help Li Auto’s Mach M100 Chip Successfully Enter Vehicle Production

As the automotive industry accelerates toward the era of embodied intelligence, bespoke high-performance automotive-grade chips are becoming a strategic priority for automakers. As part of its intelligent mobility roadmap, electric automaker Li Auto is making comprehensive efforts in bespoke, custom core computing. The company has launched the Mach M100 intelligent driving chip to accelerate the creation of a future-oriented intelligent driving system.

Synopsys and Li Auto have worked together, leveraging Synopsys’ full-stack silicon-to-systems solutions as Li Auto built a highly reliable, safe, and efficient custom chip, overcome the R&D and verification challenges of ultra-large-scale automotive-grade systems on chip (SoCs), and provide a solid technical foundation for the successful deployment of the Mach M100.

The Mach M100 officially entered mass production and was deployed in vehicles in 2026. This milestone not only marks Li Auto’s custom computing power moving from the lab to consumers but also signals a strong growth in the era of automakers building core competitiveness around high-performance, custom chips. While Mach M100 is already powering vehicles on the road, it will also be the core of computing engine for next-generation autonomous driving systems, fully demonstrating the value of collaborative innovation between automakers and ecosystem partners like Synopsys.

Autonomous driving is rapidly entering the “large model era” of AI. Model architectures are evolving from traditional convolutional neural network- (CNN) based perception to bird’s-eye view (BEV) fusion and transformer models, and further toward large vision-language-action (VLA) models. This enables intelligent driving systems to deliver stronger scenario understanding, reasoning, and decision-making capabilities, while also placing higher requirements on computing power and real-time performance for in-vehicle computing platforms. Li Auto’s Mach M100 adopts a 5nm automotive-grade process, delivers 1280 tera operations per second (TOPS) of computing power on a single chip, and achieves 82% compute utilization. At the same time, electrical/electronic architectures are accelerating from domain control toward centralized computing, placing comprehensive requirements on custom SoCs in process technology, architecture, interfaces, functional safety, and cybersecurity.

However, the R&D and mass production of automotive-grade SoCs are far more complex than those of consumer-grade chips. Chips must not only meet stringent standards and vehicle-level safety, reliability, and cybersecurity requirements, but also address design challenges including high-speed interfaces and low latency. As intelligent driving software scales beyond hundreds of millions of lines of code due to increasing demand for advanced features in vehicles (enabled by complex software component and AI), SoCs require advanced architectures to manage the increasing software and AI workload. On other hand, SoCs also require robust virtual simulation, early-stage software development, and large-scale verification capabilities; otherwise, meeting the SOP timelines, time to market, and successful mass production within limited development cycles becomes difficult. In addition, once deployed in vehicles, chips must support long-term health monitoring and predictive maintenance to ensure stable and safe operation throughout the vehicle lifecycle which can be achieved with Silicon Lifecycle Management.

As a global leader in chip design tools and automotive-grade IP technologies, Synopsys provides full-stack silicon-to-systems automotive solutions spanning from industry leading IPs through AI enabled EDA workflows to Multiphysics simulations, that are a solid foundation for custom SoCs, helping automakers differentiate with competition, reduce R&D risks, shorten time to market, and improve mass-production stability.

Safety, reliability, and high performance are core requirements of the Mach M100 project, especially as the self-developed neural processing unit (NPU) places extremely high demands on functional safety and design efficiency. Synopsys provides a complete EDA solution covering both digital and analog domains, building an efficient and reliable design foundation that has been highly recognized by Li Auto’s R&D team.

The digital design flow supports end-to-end collaboration from architecture to physical implementation, shortening R&D cycles while helping to ensure quality and performance, thereby enabling the mass production of the Mach M100. In analog circuit design, Synopsys’ dedicated EDA tools help ensure the stable operation of complex analog modules.

Automotive-grade chips have stringent requirements for IP stability and reliability, and Synopsys’ comprehensive portfolio of automotive-grade IP became a core choice for the Mach M100 project. This collaboration provided a complete IP portfolio covering LPDDR5X, Ethernet, MIPI and more, all validated on TSMC’s N5A process, laying the foundation for the smooth mass production of the Mach M100.

In terms of performance, Synopsys’ LPDDR5X IP physical layer IP interface solution achieved ultra-high data rates during the Mach M100 bring-up stage and reached verification goals in a very short time, meeting high-performance computing requirements and ensuring massive data transmission. With its board-level IP portfolio, Synopsys helped Li Auto independently design advanced driver-assistance system (ADAS) chips, improve computing performance, maximize interface bandwidth, and help ensure intelligent driving operation.

Synopsys has long provided global automakers with interface IP such as PCIe, MIPI, LPDDR and Ethernet TSN, as well as ASIL D-compliant ARC safety processors and EV/NPX vision and neural network accelerators. These IP solutions have passed AEC-Q100 reliability and ISO 9001 quality system testing and validation and are widely used in mass-production ADAS and autonomous driving SoC projects.

Facing the large-scale architecture of the Mach M100 Chip and the development cycle requirements of software-defined vehicles, Synopsys built a hardware verification hybrid setup with ZeBu emulation systems, HAPS prototyping systems, and the Synopsys Virtualizer Development Kit (VDK). This breaks down barriers between software and hardware, significantly shortens the software development cycle, supports Mach M100 software bring-up, and reduces time to market.

For the large-scale design of the Mach M100, ZeBu enabled high-speed full-system-level verification and completed verification of key functions such as MIPI four-channel video transmission and USB 3.0. In AVB TSN verification, ZeBu was the only platform that met the development requirements, demonstrating its advantages in supporting in-vehicle network protocols. For power efficiency optimization, the project adopted the ZeBu Empower power analysis flow to optimize the NPU and CPU subsystems, achieving 98% consistency between simulation and post-silicon measurements, and establishing a low-power design standard. Hybrid simulation technology breaks the boundary between software and hardware-based validation of vehicle electronics design, supports early system-level debugging, and improves the software quality. 

The Li Auto team built a high-density verification environment by cascading multiple HAPS-100 systems, completing verification of both the SoC subsystem and SoC plus single-core NPU versions. The platform ran stably above 10MHz, overcoming simulation performance bottlenecks, improving iteration efficiency, and early software bring up. The platform also integrated multiple real interfaces, including DDR, USB 3.1 and MIPI CSI-2, with peripheral daughter cards operating normally, ensuring system-level, real-world scenario verification before tape-out.

In the era of software-defined vehicles, time to market is critical. By deploying a pure VDK environment, Li Auto completed 90% of functional verification of SoC software on virtual hardware, with results highly consistent with real hardware. During subsequent silicon return verification, earlier drivers and operating systems passed testing without modification, reducing R&D risks. The VDK and ZeBu hybrid simulation mode saved hardware resources and increased NPU verification speed by 25 times, enabling rapid software iteration. At the same time, VDK supported operating system bring-up for multi-core heterogeneous architectures, enabled collaboration across multiple systems, verified secure boot flows, and achieved full coverage of driver development for in-vehicle networks and various interface IPs. 

Synopsys’ electronic digital twin (eDT) solution provides additional assurance for the Mach M100, by enabling horizontal integration with cross functional teams, eDT is delivering precise analysis throughout the design and verification flow to identify system level issues in a timely manner with improve design quality. 

With electronic digital twin and virtual ECU technologies, OEMs can start software development 6–12 months before hardware tape-out, including operating system adaptation, AI large model inference optimization, sensor data simulation, and vehicle-level scenario testing, thereby significantly improving collaboration efficiency between software and chips.

The project team also applied the RedHawk solution for power and thermal analysis. Leveraging its accumulated expertise in multiphysics simulation, RedHawk can accurately predict chip power consumption and thermal characteristics under real operating conditions, enabling early design optimization and strengthening automotive-grade reliability. Synopsys’ complete chip-to-system design analysis platform provides comprehensive assurance for functional safety, reliability, and quality.

As intelligent driving enters a new cycle driven by large models, automotive chips are reaching a critical window in which computing power, bandwidth, and safety capabilities must advance comprehensively. Heterogeneous computing, on-chip interconnect, and system-level safety capabilities will become key indicators that determine user experience and the success of mass production. Against this trend, Synopsys’ full-stack Silicon-to-Systems solutions deeply empower Li Auto’s Mach M100 project, directly addressing the R&D and verification bottlenecks of ultra-large-scale automotive-grade SoCs, accelerating development and significantly improving mass-production stability, enabling self-developed chips to move from “feasible” to “mass-producible and deliverable.”

As vehicles equipped with the Mach M100 are launched, Synopsys’ system capabilities across EDA toolchains, automotive-grade IP, functional safety, virtual prototyping, and lifecycle management will continue to translate into perceptible improvements in intelligent driving experience and vehicle reliability, further becoming a core computing advantage for automakers in the future. Looking ahead to broader industry opportunities, Synopsys will further elevate its leading strengths into architecture-to-mass-production multimodal large model support capabilities for OEMs, working with collaborators, including Li Auto, to drive intelligent automotive computing power forward.