PrimeTime

Overview

In this workshop you will learn to perform Static Timing Analysis (STA) and Signal Integrity (SI) analysis using the PrimeTime Suite of tools.  The workshop will teach our recommended methodologies for a) identifying constraints that are either incomplete/incorrect causing invalid timing violations or hiding real timing violations, and b) generating reports by executing the appropriate high-level summary reports to initiate your analysis, customizing and interpreting detailed timing reports for debugging.

You will exercise several timing checks on the design as well as analyze designs with complex timing requirements. The workshop will address a number of signoff / timing closure topics including Path Based Analysis (PBA), CCS Noise Libraries, Parametric On Chip Variation (POCV), Advanced Waveform Propagation (AWP), ECO What-if analysis, Distributed Multi Scenario Analysis (DMSA) and Hyperscale Analysis.

The workshop includes comprehensive hands-on labs, which provide an opportunity to apply several key concepts covered during the lectures.
 

Objectives

At the end of this workshop the student should be able to:

  • List the sequence of steps needed for Static Timing Analysis flow in PrimeTime
  • Create and/or restore a saved session
  • Identify opportunities to improve STA run time
  • Verify design constraints, look for untested timing checks and address the issues using a Job Aid
  • Systematically generate and interpret reports for summary and detailed design/timing information
  • Constrain/Identify design clocks that are synchronous, asynchronous and are mutually exclusive
  • Find which clocks are interacting and validate correct clock interactions
  • Exercise Setup/Hold, Recovery/Removal, Clock Gating setup/hold, Data to Data setup/hold and Minimum pulse width checks generating reports accordingly
  • Analyze timing situations involving Latches, Multi cycle paths, Combinational feedback loops, and Non unate cells along clock paths
  • Debug Timing Reports when the findings are incorrect/questionable
  • Determine when and how to use path-based analysis (PBA) to achieve timing accuracy
  • Perform crosstalk delay analysis in PrimeTime-SI using key reports from the shell and the GUI
  • Generate crosstalk noise analysis reports discussing the benefits to using CCS Noise libraries
  • Account for statistical on-chip delay variations using Parametric OCV (POCV) analysis
  • Enable Advanced Waveform Propagation (AWP) to address waveform distortions and to improve timing correlation with SPICE
  • Using (Physically Aware) ECO steps, to fix Timing, DRC and Noise violations and to reduce power
  • Address handling of a large number of scenarios and very large designs using respectively the techniques of Distributed Multi Scenario Analysis (DMSA) and Hyperscale Analysis

 

Audience Profile
ASIC digital designers, or verification engineers, who will be using PrimeTime to perform Static Timing Analysis (STA) and Signal Integrity (SI) analysis on pre- or post-layout gate level designs, and who need to validate STA constraints for correctness and completeness.
 

Prerequisites
To benefit the most from the material presented in this workshop, students should:

  • Have a basic understanding of digital IC design
  • Understand elements of gate level design: chip vs. block level, sequential vs. combinational logic, clock tree vs. data path, pre- vs. post- layout differences
  • Have familiarity with UNIX and a UNIX text editor of your choice
     

Course Outline

Day 1: STA Flow and Recommended Methodology

  • STA Concepts and Flow in PrimeTime
  • Methodology: Qualifying Constraints
  • Methodology: Generating Reports

Day 2: Best Practices

  • Constraining Multiple Clocks
  • Additional Checks and Constraints
  • Best Practices Debugging Reports
  • Signoff: Path Based Analysis (PBA)

Day 3: Signoff Considerations (Continued)

  • Signal Integrity: Crosstalk Delay Analysis
  • Signal Integrity: Crosstalk Noise Analysis''
  • Correlation: POCV and AWP Analysis
  • Timing Closure: ECO/What If Analysis
  • Large Data: DMSA and Hyperscale Analysis 

Synopsys Tools Used

PrimeTime 2018.06

PrimeTime-SI 2018.06

PrimeTime-ADV 2018.06

PrimePower 2018.06 (Optional)