SNUG Germany 2017 Proceedings

Minimizing Power of a 16nm 1.5M Instance RFSoC Digital Design using Design Compiler

Ryan Kinnerk - Xilinx

Evaluation of TetraMAX II for Small Digital Designs in Mixed Signal Applications

Richard Illman - Dialog Semiconductor

ZOIX Evaluation in a Microcontroller

Martino Quattrocchi - STMicroelectronics

Physically Aware ATPG Testpoint Insertion in DCG/ICC

Jochen Neidhardt, Dorde Cvejanovic, Dr. Jan Hayek, Bosch Sensortech

Automatic Test Point Insertion for MPHY Products