Why Attend?

The first annual Chiplet Summit allows attendees to find out how to make chiplets run faster, scale better, use less power, and be more flexible. Hear several Synopsys presentations on multi-die system design, test, and IP. Network with Synopsys experts to learn how to achieve fast heterogeneous integration with our comprehensive multi-die system solution.

Agenda


Tuesday
Pre-Conference Tutorial
Tue. January 24, 2023
08:30 - 12:00 PM PST
Tutorial A: Chiplet Testing Basics
  • Yervant Zorian, Chief Architect/Fellow
Pre-Conference Tutorial
Tue. January 24, 2023
08:30 - 12:00 PM PST
Die-to-Die Interfaces
  • Synopsys Panelist: Mick Posner, Product Line Senior Group Director
Pre-Conference Tutorial
Tue. January 24, 2023
01:00 - 05:00 PM PST
Tutorial E: Designing for Power, Performance, and Area (PPA) for Multi-Die and 3D ICs
  • Kenneth Larsen, Director of Product Management
Pre-Conference Tutorial
Tue. January 24, 2023
01:00 - 05:00 PM PST
Tutorial G: Incorporating Design-for-Test into the Development of Chiplet-Based Systems
  • Adam Cron, Distinguished Architect
Wednesday
Annual Update Track
Wed. January 25, 2023
03:15 - 04:15 PM PST
Annual Update on Chiplet Design: Multi-Die System in the SysMoore Era
  • Shekhar Kapoor, Sr. Director of Product Management
Panel Track
Wed. January 25, 2023
03:15 - 04:15 PM PST
Best Way to Optimize Chiplets
  • Synopsys Panelist: Kenneth Larsen, Director of Product Management
Annual Update Track
Wed. January 25, 2023
04:30 - 05:30 PM PST
Annual Update on Interfaces
  • Mick Posner, Senior Product Line Group Director
Thursday
Design/Packaging/Interfaces/Applications Track
Thu. January 26, 2023
09:00 - 10:00 AM PST
UCIe: An Open Standard Interface for Chiplet-Based Multi-Die Systems
  • Manuel Mota, Sr. Product Manager
Design/Packaging/Interfaces/Applications Track
Thu. January 26, 2023
09:00 - 10:00 AM PST
Simplifying Chiplet Interconnect Development with Interface IP
  • Manmeet Walia, Director of Product Management
Annual Update Track
Thu. January 26, 2023
09:00 - 10:00 AM PST
Annual Update on Test of Multi-Die Designs
  • Yervant Zorian, Chief Architect/Fellow
  • Mike Ricchetti, SoC/DFT Architect


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Expert Table Leaders Session

 

Attend the Expert Table Leaders Session on Tuesday, January 24, from 6:00 PM – 8:30 PM to network with Synopsys presenters, architects and fellows.