DesignWare PHY IP for PCI Express 3.1

The multi-channel DesignWare PHY IP for PCI Express® (PCIe®) 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for higher bandwidth. The PHY is small in area and provides a low-power, cost-effective solution that is designed to support PCI-SIG PCIe 3.1, 2.1, and 1.1 specifications and to meet the needs of applications with high-speed chip-to-chip, board-to-board, and backplane interfaces. In addition, its low power consumption cuts both active and standby power for mobile SoCs.

Using leading-edge design, analysis, simulation, and measurement techniques, Synopsys delivers exceptional signal integrity and jitter performance that exceeds the PCIe standard’s electrical specifications. The high-margin, robust PHY architecture tolerates process, voltage and temperature (PVT) manufacturing variations and is implemented with standard CMOS digital process technologies.

The DesignWare PHY IP for PCIe 3.1 reduces both product development cycles and the need for costly field support by employing internal test features. The multi-tap transmitter and receiver equalizers, along with the advanced built-in diagnostics and ATE test vectors, enable customers to control, monitor and test for signal integrity without the need for expensive test equipment. This provides on-chip visibility into actual link and channel performance to quickly improve signal integrity.

Synopsys offers a portfolio of silicon-proven IP for PCIe consisting of controllers, PHYs, verification IP, IP Prototyping Kits, Software Development Kits and Interface IP Subsystems. As the industry standard for PCIe, Synopsys' solution is in volume production and has been successfully implemented in a wide range of applications.

DesignWare IP for PCI Express Complete Solution Datasheet
DesignWare PHY IP for PCI Express 3.1 Datasheet
 

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• Supports all the required features of the PCIe 3.1 (8.0 GT/s), 2.1 (5.0 GT/s) and 1.1 (2.5 GT/s) specifications as well as the PIPE 3 and 4 (8-bit, 16-bit and 32-bit) specifications
• Supports a wide range of PCI Express lane aggregation up to 16-lanes and full bifurcation
• Includes robust backchannel initialization and advanced power management features including L1 sub-states in conjunction with power gating techniques
• Exceeds electrical specifications in areas of margin and receive sensitivity for a robust design
• Built-in self-test (BIST) including 7-, 9-, 11-, 15-, 16-, 23-, and 31-bit pseudo random bit stream (PRBS) generation and checker
• Automatic Test Equipment (ATE) test vectors for complete, at-speed production testing
• Industry's leading, complete PCI Express 3.1 IP solution: digital controllers, PHY and verification IP
• Supports advanced 28-nm and 14/16-nm FinFET technologies and flip-chip packaging

10G PHY for PCIe 3.0, TSMC 10FF x1, North/South (vertical) poly orientation	STARs	Subscribe
10G PHY for PCIe 3.0, TSMC 16FFC x2, North/South (vertical) poly orientation	STARs	Subscribe
10G PHY for PCIe 3.0, TSMC 16FFPGL x4, North/South (vertical) poly orientation	STARs	Subscribe
10G PHY for PCIe 3.0, TSMC 16FFPLL x1, North/South (vertical) poly orientation	STARs	Subscribe
8G PHY for PCIe 3.0, TSMC 28HPC x4, North/South (vertical) poly orientation	STARs	Subscribe
8G PHY for PCIe 3.0, TSMC 28HPM x1, North/South (vertical) poly orientation	STARs	Subscribe
8G PHY for PCIe 3.0, TSMC 28HPM x2, North/South (vertical) poly orientation	STARs	Subscribe
PCIe 3.0 PHY, GF 28HPP x4, East/West poly orientation	STARs	Subscribe
PCIe 3.0 PHY, GF 28HPP x8, East/West poly orientation	STARs	Subscribe
PCIe 3.0 PHY, TSMC 28HPC x4, North/South (vertical) poly orientation	STARs	Subscribe
PCIe 3.0 PHY, TSMC 28HPC x8, North/South (vertical) poly orientation	STARs	Subscribe

Description	10G PHY for PCIe 3.0, TSMC 10FF x1, North/South (vertical) poly orientation
Name	dwc_c10pcie3phy_tsmc10ffx1ns
Version	1.02a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Contact Us for More Information
Download	PCIe-30-PHY_C10_TSMC_10FF_x1
Product Code	B942-0
Description	10G PHY for PCIe 3.0, TSMC 16FFC x2, North/South (vertical) poly orientation
Name	dwc_c10pcie3phy_tsmc16ffc_x2ns
Version	1.02a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Databooks Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 PHY Consumer PCIe 3.0 PHY for the DesignWare Cores Consumer PCIe 3.0 PHY
Download	PCIe-30-PHY_C10_TSMC_16FFC_x2
Product Code	C047-0
Description	10G PHY for PCIe 3.0, TSMC 16FFPGL x4, North/South (vertical) poly orientation
Name	dwc_c10pcie3phy_tsmc16ffpgl_x4ns
Version	1.02a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Application Note SERDES PCB and Packaging Design Guide
Download	PCIe-30-PHY_C10_TSMC_16FFPGL_x4
Product Code	A827-0
Description	10G PHY for PCIe 3.0, TSMC 16FFPLL x1, North/South (vertical) poly orientation
Name	dwc_c10pcie3phy_tsmc16ffpll_x1ns
Version	1.03b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Contact Us for More Information
Download	PCIe-30-PHY_C10_TSMC_16FFPLL_x1
Product Code	B865-0
Description	8G PHY for PCIe 3.0, TSMC 28HPC x4, North/South (vertical) poly orientation
Name	dwc_c8g_pcie3phy_tsmc28hpc_x4ns
Version	1.04c
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Application Notes DesignWare Cores Consumer 8G PHY ATE Test Bench SERDES PCB and Packaging Design Guide Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare Cores Consumer 8G PHY Consumer 8G SATA Rate 6G PCS for the DesignWare Cores Consumer 8G PHY Current Databook with Change Bars DesignWare Cores Consumer 8G PHY for TSMC 28 HPC Datasheets DesignWare Consumer 8G PHY Datasheet DesignWare Multi-Protocol 8G PHY Datasheet
Download	PCIe-30-PHY_TSMC_28HPC_x4
Product Code	A731-0
Description	8G PHY for PCIe 3.0, TSMC 28HPM x1, North/South (vertical) poly orientation
Name	dwc_c8g_pcie3phy_tsmc28hpm_x1ns
Version	1.04b
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Application Note SERDES PCB and Packaging Design Guide Datasheets DesignWare Consumer 8G PHY Datasheet DesignWare Multi-Protocol 8G PHY Datasheet
Download	PCIe-30-PHY_C8_TSMC_28HPM_x1
Product Code	A767-0
Description	8G PHY for PCIe 3.0, TSMC 28HPM x2, North/South (vertical) poly orientation
Name	dwc_c8g_pcie3phy_tsmc28hpm_x2ns
Version	1.04a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Datasheets DesignWare Consumer 8G PHY Datasheet DesignWare Multi-Protocol 8G PHY Datasheet
Download	PCIe-30-PHY_C8_TSMC_28HPM_x2
Product Code	A768-0
Description	PCIe 3.0 PHY, GF 28HPP x4, East/West poly orientation
Name	dwc_pcie3phy_gf28hpp_x4ew
Version	1.08a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores Enterprise 10G PCIe 3.0 PHY for GLOBALFOUNDRIES 28 HPP White Paper Virtualizing Cloud Computing With Optimized IP for NFV SoCs
Download	PCIe-30-PHY_GF_28HPP_x4EW
Product Code	9022-0
Description	PCIe 3.0 PHY, GF 28HPP x8, East/West poly orientation
Name	dwc_pcie3phy_gf28hpp_x8ew
Version	1.08a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores Enterprise 10G PCIe 3.0 PHY for GLOBALFOUNDRIES 28 HPP White Paper Virtualizing Cloud Computing With Optimized IP for NFV SoCs
Download	PCIe-30-PHY_GF_28HPP_x8EW
Product Code	9023-0
Description	PCIe 3.0 PHY, TSMC 28HPC x4, North/South (vertical) poly orientation
Name	dwc_pcie3phy_tsmc28hpc_x4ns
Version	1.12a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Application Note DesignWare Cores Enterprise 10G PCIe 3.0 PHY ATE Test Bench Databooks Current Databook with Change Bars DesignWare Cores Enterprise 10G PCIe 3.0 PHY for TSMC 28 HPC Enterprise 10G PCIe 3.0 PCS for the DesignWare Cores Enterprise 10G PHY
Download	PCIe-30-PHY_E10_TSMC_28HPC_x4
Product Code	B063-0
Description	PCIe 3.0 PHY, TSMC 28HPC x8, North/South (vertical) poly orientation
Name	dwc_pcie3phy_tsmc28hpc_x8ns
Version	1.12a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Application Note DesignWare Cores Enterprise 10G PCIe 3.0 PHY ATE Test Bench Databooks Current Databook with Change Bars DesignWare Cores Enterprise 10G PCIe 3.0 PHY for TSMC 28 HPC Enterprise 10G PCIe 3.0 PCS for the DesignWare Cores Enterprise 10G PHY
Download	PCIe-30-PHY_E10_TSMC_28HPC_x8
Product Code	B064-0