Description: |
10G PHY for Differential Buffer, GF 12LP, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_gf12lp_ns |
Version: |
1.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databook DesignWare Cores Differential Buffer Databook for GF 12 LP (PHY Version: 1.00a) ( HTML | PDF )
Release Notes DesignWare Cores Differential Buffer Release Notes for GF 12 LP (PHY Version: 1.00a) ( TXT )
|
Download: |
DiffBuf_NS_GF_12LP |
Product Code: |
E099-0 |
| |
Description: |
10G PHY for Differential Buffer, TSMC N3E, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_tsmc3eff_ns |
Version: |
3.01a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databook DesignWare Core Differential Buffer for TSMC3eFF Databook (PHY Version:3.01a) ( PDF | HTML )
Release Notes DesignWare Core Differential Buffer for TSMC3eFF Release Notes (PHY Version: 3.01a) ( TXT )
|
Download: |
dwc_diffbuf_tsmc3eff_ns |
Product Code: |
G450-0 |
| |
Description: |
10G PHY for Differential Buffer, TSMC N5, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_tsmc5ff_ns |
Version: |
3.07a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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DesignWare Cores |
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Databook DesignWare Cores Differential Buffer for TSMC 5FF (PHY Version:3.07a_d1) ( PDF | HTML )
Release Notes DesignWare Cores Differential Buffer Release Notes for TSMC 5FF (PHY Version: 3.07a) ( TXT )
|
Download: |
dwc_diffbuf_tsmc5ff_ns |
Product Code: |
F690-0 |
| |
Description: |
10G PHY for Differential Buffer, TSMC N6, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_tsmc6ff_ns |
Version: |
3.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databook DesignWare Cores Differential Buffer for TSMC 6FF Databook (PHY Version:3.00a) ( PDF | HTML )
Release Notes DesignWare Cores Differential Buffer Release Notes for TSMC 6FF (PHY Version: 3.00a) ( TXT )
|
Download: |
dwc_diffbuf_tsmc6ff_ns |
Product Code: |
H149-0 |
| |
Description: |
10G PHY for Differential Buffer, TSMC N7, North/South (vertical) poly orientation |
Name: |
dwc_diffbuf_tsmc7ff_ns |
Version: |
2.09a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Databook DesignWare Cores Differential Buffer Databook for TSMC 7FF (PHY Version: 2.09a) ( PDF | HTML )
Release Notes DesignWare Cores Differential Buffer Release Notes for TSMC 7FF (PHY Version: 2.09a) ( TXT )
|
Download: |
dwc_diffbuf_tsmc7ff_ns |
Product Code: |
C522-0 |
| |
Description: |
10G PHY for PCIe 3.0, GF 22FFDSOI X1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_gf22fdsoiext_x1ns |
Version: |
2.04c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10G PCIe 3.1 PHY ATE Test Bench (Doc Version: 1.80a) ( HTML | PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.1 PCS for the DesignWare Cores PCIe 3.1 PHY (PCS Version: 3.2.6) ( HTML | PDF )
DesignWare Cores Consumer 10G PCIe3 PHY for GF 22FDSOI-EXT (PHY Version: 2.04c) ( PDF | HTML )
Release Notes DesignWare Cores PCIe3 x1 NS for GF 22FDSOIEXT 1.8V (PHY Version: 2.04c) ( TXT )
|
Download: |
dwc_c10pcie3phy_gf22fdsoiext_x1ns |
Product Code: |
E187-0 |
| |
Description: |
10G PHY for PCIe 3.0, SS 8LPP x2, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_ss8lpp_x2ns |
Version: |
1.01b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for SS8LPP ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.1 PCS for the DesignWare Cores Consumer PCIe 3.1 PHY for SS 8 LPE (PHY Version: 1.01a) ( HTML | PDF )
DesignWare Cores Consumer 10G PCIe 3.1 PHY for SS 8 LPE Databook (PHY Version: 1.01b) ( PDF | HTML )
Release Notes DesignWare Cores Consumer 10G PCIe 3.1 PHY x1 NS for SS 8 LPE Release Notes (PHY Version: 1.01a) ( TXT )
|
Download: |
dwc_c10pcie3phy_ss8lpp_x2ns |
Product Code: |
F495-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 10FF x1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc10ffx1ns |
Version: |
1.03a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for TSMC16 ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 for TSMC16 PHY ( PDF )
DesignWare Cores Consumer 10 PCIe 3.0 PHY for TSMC 10 FF ( PDF )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
PCIe-30-PHY_C10_TSMC_10FF_x1 |
Product Code: |
B942-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 12FFC x1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc12ffcx1ns |
Version: |
1.07a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench Application Note (Doc Version: 1.70a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 10G PCIe 3.1 PHY x1 for TSMC 12 FFC Databook (PHY Version: 1.07a) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores Consumer 10G PCIe 3.1 PHY (PCS Version: 3.52b) ( PDF | HTML )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Release Notes Consumer 10G PCIe 3.1 PHY x1 for TSMC 12 FFC Release Notes (PHY Version: 1.07a) ( TXT )
|
Download: |
dwc_c10pcie3phy_tsmc12ffcx1ns |
Product Code: |
C478-0, F900-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 12FFC x2, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc12ffcx2ns |
Version: |
1.07a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench Application Note (Doc Version: 1.70a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY x2 for TSMC12FFC Databook (PHY Version: 1.07a)) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores Consumer 10G PCIe 3.1 PHY (PCS Version: 3.52c) ( PDF | HTML )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Release Notes PCIe 3.0 PHY x2 NS for TSMC 12FFC 1.8V Release Notes (PHY Version: 1.07a) ( TXT )
|
Download: |
dwc_c10pcie3phy_tsmc12ffcx2ns |
Product Code: |
C479-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 12FFC x4, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc12ffcx4ns |
Version: |
1.07a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench Application Note (Doc Version: 1.70a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC12FFC x4 (PHY Version: 1.07a) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores Consumer 10G PCIe 3.1 PHY (PCS Version: 3.52a) ( PDF | HTML )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Release Notes Consumer PCIe 3.0 PHY for TSMC12FFC x4 NS 1.8V (PHY Version: 1.07a) ( TXT )
|
Download: |
dwc_c10pcie3phy_tsmc12ffcx4ns |
Product Code: |
C480-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFC x1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc16ffc_x1ns |
Version: |
1.10a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench Application Note (Doc Version: 1.70a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC16FFC x1 (PHY Version: 1.10a) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores Consumer 10G PCIe 3.1 PHY (PCS Version: 3.52b) ( PDF | HTML )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Release Notes DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC16FFC x1 Release Notes (PHY Version: 1.10a) ( TXT )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
dwc_c10pcie3phy_tsmc16ffc_x1ns |
Product Code: |
B988-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFC x16, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc16ffc_x16ns |
Version: |
1.07a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for TSMC16 ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databook Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 for TSMC16 PHY ( PDF )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
PCIe-30-PHY_C10_TSMC_16FFC_x16 |
Product Code: |
C420-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFC x2 for Automotive, North/South (vertical) poly orientation |
Name: |
dwc_ap_c10pcie3phy_tsmc16ffc_x2ns |
Version: |
1.06a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Product Type: |
DesignWare Cores |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY for TSMC16 FFC ATE Test Bench Application Note (PHY Version: 1.05a) ( HTML | PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 PHY (PHY Version: 1.06a) ( HTML | PDF )
DesignWare Cores 10G AP PCIe 3.0 PHY for TSMC16FFC Databook (PHY Version: 1.06a_d1) ( PDF | HTML )
Datasheet Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Release Notes DesignWare Cores Consumer 10G AP PCIe 3.0 PHY for TSMC16FFC Release Notes (PHY Version: 1.06a) ( TEXT )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
White Paper IP for Centralized ADAS Domain Controllers ( PDF )
|
Download: |
dwc_ap_c10pcie3phy_tsmc16ffc_x2ns |
Product Code: |
C085-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFC x2, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc16ffc_x2ns |
Version: |
1.10a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench Application Note (Doc Version: 1.70a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC16FFC x2 Databook (PHY Version: 1.10a) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores Consumer 10G PCIe 3.1 PHY (PCS Version: 3.52c) ( PDF | HTML )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Release Notes DesignWare Cores USB 3.1 SS+ PHY for TSMC16FFC x2 Release Notes (PHY Version: 1.10a) ( TEXT )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
dwc_c10pcie3phy_tsmc16ffc_x2ns |
Product Code: |
C047-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFC x4 for Automotive, North/South (vertical) poly orientation |
Name: |
dwc_ap_c10pcie3phy_tsmc16ffc_x4ns |
Version: |
1.04b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for TSMC16 ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 10G AP PCIe 3.0 PHY for the DesignWare Cores Consumer PCIe 3.0 PHY ( PDF )
Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 for TSMC16 PHY ( PDF )
DesignWare Cores 10G AP PCIe 3.0 PHY for TSMC16FFC Databook (PHY Version: 1.04b_d1) ( PDF | HTML )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
White Paper IP for Centralized ADAS Domain Controllers ( PDF )
|
Download: |
AP-PCIe-30-PHY_TSMC_16FFC_x4 |
Product Code: |
C372-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFC x4, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc16ffc_x4ns |
Version: |
1.10a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench Application Note (Doc Version: 1.70a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC16FFC x4 Databook (PHY Version: 1.10a) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores Consumer 10G PCIe 3.1 PHY (PCS Version: 3.52a) ( PDF | HTML )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Release Notes DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC16FFC x4 Release Notes (PHY Version: 1.10a) ( TEXT )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
dwc_c10pcie3phy_tsmc16ffc_x4ns |
Product Code: |
B943-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFPGL x4, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc16ffpgl_x4ns |
Version: |
1.05a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for TSMC16 ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 for TSMC16 PHY ( PDF )
DesignWare Cores Consumer 10 PCIe 3.0 PHY for TSMC 16 FFPGL ( PDF )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
PCIe-30-PHY_C10_TSMC_16FFPGL_x4 |
Product Code: |
A827-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 16FFPLL x1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc16ffpll_x1ns |
Version: |
1.05bpatch1 |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes Designware Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for TSMC16 ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.0 PCS for the DesignWare Cores Consumer PCIe 3.0 for TSMC16 PHY ( PDF )
DesignWare Cores Consumer 10 PCIe 3.0 PHY for TSMC 16 FFPLL ( PDF )
Datasheets Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 10G PHY IP Datasheet ( PDF )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
PCIe-30-PHY_C10_TSMC_16FFPLL_x1 |
Product Code: |
B865-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 6FF x1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc6ff_x1ns |
Version: |
4.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench (Doc Version: 1.90a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC6FF x1 Databook (PHY Version: 4.03b) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores C10 PCIe 3.1 PHY (PCS Version: 3.54c) ( PDF | HTML )
Release Notes DWC Consumer 10 PCIe 3.1 PHY x1 for TSMC6FF 1.8V Release Notes (PHY Version: 4.03b) ( TEXT )
|
Download: |
dwc_c10pcie3phy_tsmc6ff_x1ns |
Product Code: |
F849-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 6FF x2, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc6ff_x2ns |
Version: |
4.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench (Doc Version: 1.90a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC6FF x2 Databook (PHY Version: 4.03b_d1) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores C10 PCIe 3.1 PHY (PCS Version: 3.54a) ( PDF | HTML )
Release Notes DWC Consumer 10 PCIe 3.1 PHY x2 for TSMC6FF 1.8V Release Notes (PHY Version: 4.03b) ( TEXT )
|
Download: |
dwc_c10pcie3phy_tsmc6ff_x2ns |
Product Code: |
F850-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 6FF x4, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc6ff_x4ns |
Version: |
4.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench (Doc Version: 1.90a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10G PCIe 3.1 PHY for TSMC6FF x4 Databook (PHY Version: 4.03b) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores C10 PCIe 3.1 PHY (PCS Version: 3.54b) ( PDF | HTML )
Release Notes DWC Consumer 10 PCIe 3.1 PHY x4 for TSMC6FF 1.8V Release Notes (PHY Version: 4.03b) ( TEXT )
|
Download: |
dwc_c10pcie3phy_tsmc6ff_x4ns |
Product Code: |
F851-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 7FF x1, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc7ff_x1ns |
Version: |
4.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench (Doc Version: 1.90a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10 PCIe 3.1 PHY for TSMC7FF (PHY Version: 4.03b) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores C10 PCIe 3.1 PHY (PCS Version: 3.54c) ( PDF | HTML )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Release Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY x1 NS for TSMC 7FF 1.8V Release Notes (PHY: Version 4.03b) ( TXT )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
dwc_c10pcie3phy_tsmc7ff_x1ns |
Product Code: |
C476-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 7FF x2, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc7ff_x2ns |
Version: |
4.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench (Doc Version: 1.90a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare Cores Consumer 10 PCIe 3.1 PHY x2 for TSMC7FF (PHY Version: 4.03b_d1) ( PDF | HTML )
PCIe 3.1 PCS for the DesignWare Cores C10 PCIe 3.1 PHY (PCS Version: 3.54a) ( PDF | HTML )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Release Notes PCIe 3.1 PHY x2 NS for TSMC7FF 1.8V Release Notes (PHY Version: 4.03b) ( TXT )
Success Stories Starblaze Technology Achieves Volume Production of SSD Controller SoC With Synopsys IP Portfolio ( PDF )
新思科技与忆芯科技 忆芯科技采用新思科技的Synopsys IP系列实现SSD控制器的批量生产 ( PDF )
|
Download: |
dwc_c10pcie3phy_tsmc7ff_x2ns |
Product Code: |
C477-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC 7FF x4, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc7ff_x4ns |
Version: |
4.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores Consumer 10 PCIe 3.1 PHY ATE Test Bench for TSMC7FF (PHY Version 4.01a) ( HTML | PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.1 PCS for the DesignWare Cores Consumer PCIe 3.1 PHY for TSMC7FF x4 (PHY Version: 4.01a) ( HTML | PDF )
DesignWare Cores Consumer 10 PCIe 3.1 PHY for TSMC7FF x4 (PHY Version: 4.03b) ( PDF | HTML )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Release Notes DesignWare Cores C10 PCIe 3.1 PHY x4 NS for TSMC7FF 1.8V Release Notes (PHY Version: 4.03b) ( TXT )
|
Download: |
dwc_c10pcie3phy_tsmc7ff_x4ns |
Product Code: |
C605-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC N5 X2, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc5ff_x2ns |
Version: |
4.01c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores Consumer 10G PCIe 3 PHY ATE Test Bench (May 20, 2022) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.1 PCS for the DesignWare Cores PCIe 3.1 PHY x2 (PCS Version: 3.55a) ( PDF | HTML )
DesignWare Cores Consumer 10 PCIe 3.1 PHY for TSMC5FF x2 (PHY Version: 4.01c) ( PDF | HTML )
Reference Manual DesignWare Cores Consumer 10 PCIe 3.1 PHY for TSMC5FF x2 Reference Manual (PHY Version: 4.01c) ( PDF | HTML )
Release Notes DesignWare Cores C10 PCIe 3.1 PHY x2 for TSMC5FF 1.2V Release Notes (PHY Version: 4.01c) ( TXT )
|
Download: |
dwc_c10pcie3phy_tsmc5ff_x2ns |
Product Code: |
E458-0 |
| |
Description: |
10G PHY for PCIe 3.0, TSMC5FF X4, North/South (vertical) poly orientation |
Name: |
dwc_c10pcie3phy_tsmc5ff_x4ns |
Version: |
4.01c |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare Cores Compilation Using the LC and FC End-User Platform (Doc Version: 2022.02) ( PDF | HTML )
DesignWare Cores Consumer 10G PCIe 3 PHY ATE Test Bench (May 20, 2022) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer PCIe 3.1 PCS for the DesignWare Cores PCIe 3.1 PHY (PCS Version: 3.55b) ( PDF | HTML )
DesignWare Cores Consumer 10 PCIe 3.1 PHY for TSMC5FF x4 (PHY Version: 4.01c) ( PDF | HTML )
Reference Manual DesignWare Cores Consumer 10 PCIe 3.1 PHY for TSMC5FF x4 Reference Manual (PHY Version: 4.01c) ( PDF | HTML )
Release Notes DWC PCIe 3.1 PHY x4 NS for TSMC5FF 1.2V Release Notes (PHY Version: 4.01c) ( TXT )
|
Download: |
dwc_c10pcie3phy_tsmc5ff_x4ns |
Product Code: |
E459-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPC x1, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpc_x1ns |
Version: |
1.04d |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.12) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
DesignWare® Cores Consumer 8G PCIe 3.0 One-Lane PHY for TSMC 28 HPC Databook (PHY Version: 1.04d) ( PDF | HTML )
DesignWare® Cores Consumer 8G PCIe 3.0 One-Lane PHY for TSMC 28 HPC Databook with Change Bars (PHY Version: 1.04d) ( PDF )
Datasheets Synopsys Consumer 8G PHY Datasheet ( PDF )
Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 8G PHY Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
Release Notes DesignWare® Cores Consumer 8G One-Lane PHY for TSMC 28 HPC Release Notes (PHY Version: 1.04d) ( TXT )
|
Download: |
PCIe-30-PHY_TSMC_28HPC_x1 |
Product Code: |
A729-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPC x2, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpc_x2ns |
Version: |
1.04e |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.11) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY ( PDF )
Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
DesignWare® Cores Consumer 8G PHY for TSMC 28 HPC Databook (PHY Version: 1.04e) ( PDF | HTML )
DesignWare® Cores Consumer 8G Two-Lane PHY for TSMC 28 HPC Databook with Change Bars (PHY Version: 1.04e) ( PDF )
Datasheets Synopsys Consumer 8G PHY Datasheet ( PDF )
Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 8G PHY Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
Release Notes DesignWare® Cores Consumer 8G PHY for TSMC 28 HPC (Two Lanes) Release Notes ( TXT )
|
Download: |
PCIe-30-PHY_TSMC_28HPC_x2 |
Product Code: |
A730-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPC x4, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpc_x4ns |
Version: |
1.04e |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Product Type: |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.11) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
DesignWare® Cores Consumer 8G PHY for TSMC 28 HPC Databook (PHY Version: 1.04e) ( PDF | HTML )
DesignWare® Cores Consumer 8G Two-Lane PHY for TSMC 28 HPC Databook with Change Bars (PHY Version: 1.04e) ( PDF )
Datasheets Synopsys Consumer 8G PHY Datasheet ( PDF )
Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 8G PHY Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
Release Notes DesignWare® Cores Multi-Protocol 8G PHY for TSMC 28 HPC (Four Lanes) Release Notes ( TXT )
Success Stories AMD Delivers Industry-Leading Ryzen and EPYC Processors with Synopsys DDR4, USB 3.0, PCIe 3.1, Ethernet & Foundation IP on 14-nm Process ( PDF )
AMD采用14纳米工艺,推出配有DesignWare DDR4、USB 3.0、PCIe 3.1、Ethernet and Foundation IP的行业领先的Ryzen和EPYC处理器 ( PDF )
|
Download: |
PCIe-30-PHY_TSMC_28HPC_x4 |
Product Code: |
A731-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPC x8, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpc_x8ns |
Version: |
1.04e |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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DesignWare Cores |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.11) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
DesignWare® Cores Consumer 8G PHY for TSMC 28 HPC Databook (PHY Version: 1.04e) ( PDF | HTML )
DesignWare® Cores Consumer 8G Two-Lane PHY for TSMC 28 HPC Databook with Change Bars (PHY Version: 1.04e) ( PDF )
Datasheets Synopsys Consumer 8G PHY Datasheet ( PDF )
Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Synopsys Multi-Protocol 8G PHY Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
Release Notes DesignWare® Cores Multi-Protocol 8G PHY for TSMC 28 HPC (Eight Lanes) Release Notes ( TXT )
|
Download: |
PCIe-30-PHY_C8_TSMC_28HPC_x8 |
Product Code: |
A808-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPCP x1, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpcp_x1ns |
Version: |
1.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.12) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
Consumer 8G SATA Rate 6G PCS for the DesignWare® Cores Consumer 8G PHY (September 22, 2016) ( PDF )
DesignWare® Cores Multi-Protocol 8G PHY for TSMC 28 HPCP Databook ( PDF | HTML )
DesignWare® Cores Multi-Protocol 8G PHY for TSMC 28 HPCP Databook with Change Bars ( PDF )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
|
Download: |
PCIe-30-PHY_C8_TSMC_28HPCP_x1 |
Product Code: |
B637-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPCP x2, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpcp_x2ns |
Version: |
1.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Product Type: |
DesignWare Cores |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.12) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
Consumer 8G SATA Rate 6G PCS for the DesignWare® Cores Consumer 8G PHY (September 22, 2016) ( PDF )
DesignWare® Cores Multi-Protocol 8G PHY for TSMC 28 HPCP Databook ( PDF | HTML )
DesignWare® Cores Multi-Protocol 8G PHY for TSMC 28 HPCP Databook with Change Bars ( PDF )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
|
Download: |
PCIe-30-PHY_C8_TSMC_28HPCP_x2 |
Product Code: |
B638-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPCP x4, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpcp_x4ns |
Version: |
1.02b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Subscribe for Notifications |
Product Type: |
DesignWare Cores |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.12) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 8G PHY ATE Testbench (Doc Version: 1.13) ( PDF )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
DesignWare Cores PCIe 3.1 Four-Lane PHY for TSMC 28 HPCP Databook (PHY Version: 1.02b) ( HTML | PDF )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
Release Notes DesignWare® Cores PCIe 3.0 Four-Lane PHY for TSMC 28 HPCP Release Notes (PHY Version: 1.02b) ( TXT )
|
Download: |
dwc_c8g_pcie3phy_tsmc28hpcp_x4ns |
Product Code: |
B639-0 |
| |
Description: |
8G PHY for PCIe 3.0, TSMC 28HPCP x8, North/South (vertical) poly orientation |
Name: |
dwc_c8g_pcie3phy_tsmc28hpcp_x8ns |
Version: |
1.02b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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Product Type: |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Test Bench (Doc Version: 1.12) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PCIe 3.0 8G PHY ATE Testbench (Doc Version: 1.13) ( PDF )
DesignWare® Cores PCIe 3.0 PHY Unified Power Format (UPF) (Doc Version 1.00a) ( PDF )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
Consumer 8G SATA Rate 6G PCS for the DesignWare® Cores Consumer 8G PHY (September 22, 2016) ( PDF )
DesignWare Cores PCIe 3.1 Four-Lane PHY for TSMC 28 HPCP Databook (PHY Version: 1.02b) ( HTML | PDF )
Datasheet Synopsys IP for PCI Express Complete Solution Datasheet ( PDF )
Installation Guide DesignWare® Cores Multi-Protocol 8G PHY Installation Guide (Doc Version: 1.00a) ( PDF )
Release Notes DesignWare® Cores PCIe 3.0 Eight-Lane PHY for TSMC 28 HPCP Release Notes (PHY Version: 1.02b) ( TXT )
|
Download: |
dwc_c8g_pcie3phy_tsmc28hpcp_x8ns |
Product Code: |
B640-0 |
| |
Description: |
8G2 PHY for PCIe 3.0, TSMC 22ULP x2, North/South (vertical) poly orientation |
Name: |
dwc_c8g2_pcie3phy_tsmc22ulp_x2ns |
Version: |
2.02a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
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DesignWare Cores |
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Application Notes DesignWare® Cores Consumer 8G PHY ATE Testbench (Doc Version: 1.03) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (September 23, 2016) ( PDF )
DesignWare Cores PCIe 3.1 Two-Lane PHY for TSMC 22 ULP Databook (PHY Version: 2.02a) ( HTML | PDF )
Release Notes DesignWare® Cores PCIe 8G Two-Lane PHY for TSMC 22 ULP Release Notes (PHY Version: 2.02a) ( TXT )
|
Download: |
PCIe-30-PHY_C8_TSMC_22ULP_x2 |
Product Code: |
D815-0 |
| |
Description: |
8G2 PHY for PCIe 3.0, UMC 22ULP x4, North/South (vertical) poly orientation |
Name: |
dwc_c8g2_pcie3phy_umc22ulp_x4ns |
Version: |
2.00a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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DesignWare Cores |
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Application Notes DesignWare® Cores PCIe 3.1 8G PHY ATE Test Bench (Doc Version: 1.03) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks Consumer 8G PCIe 3.0 PCS for the DesignWare® Cores Consumer 8G PHY (January 11, 2019) ( PDF )
DesignWare® Cores PCIe 3.1 Four-Lane PHY for UMC 22 ULP Databook (PHY Version: 2.00a) ( HTML | PDF )
Release Notes DesignWare® Cores PCIe 8G Four-Lane PHY for UMC 22 ULP Release Notes (PHY Version: 2.00a) ( TXT )
|
Download: |
dwc_c8g2_pcie3phy_umc22ulp_x4ns |
Product Code: |
E981-0 |
| |
Description: |
PCIe 3.0 PHY, GF 28HPP x4, East/West poly orientation |
Name: |
dwc_pcie3phy_gf28hpp_x4ew |
Version: |
1.08a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Product Type: |
DesignWare Cores |
Documentation: |
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Databook DesignWare Cores Enterprise 10G PCIe 3.0 PHY for GLOBALFOUNDRIES 28 HPP ( PDF )
Success Stories AMD Delivers Industry-Leading Ryzen and EPYC Processors with Synopsys DDR4, USB 3.0, PCIe 3.1, Ethernet & Foundation IP on 14-nm Process ( PDF )
AMD采用14纳米工艺,推出配有DesignWare DDR4、USB 3.0、PCIe 3.1、Ethernet and Foundation IP的行业领先的Ryzen和EPYC处理器 ( PDF )
White Paper Virtualizing Cloud Computing With Optimized IP for NFV SoCs ( PDF )
|
Download: |
PCIe-30-PHY_GF_28HPP_x4EW |
Product Code: |
9022-0 |
| |
Description: |
PCIe 3.0 PHY, GF 28HPP x8, East/West poly orientation |
Name: |
dwc_pcie3phy_gf28hpp_x8ew |
Version: |
1.08a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Databook DesignWare Cores Enterprise 10G PCIe 3.0 PHY for GLOBALFOUNDRIES 28 HPP ( PDF )
Success Stories AMD Delivers Industry-Leading Ryzen and EPYC Processors with Synopsys DDR4, USB 3.0, PCIe 3.1, Ethernet & Foundation IP on 14-nm Process ( PDF )
AMD采用14纳米工艺,推出配有DesignWare DDR4、USB 3.0、PCIe 3.1、Ethernet and Foundation IP的行业领先的Ryzen和EPYC处理器 ( PDF )
White Paper Virtualizing Cloud Computing With Optimized IP for NFV SoCs ( PDF )
|
Download: |
PCIe-30-PHY_GF_28HPP_x8EW |
Product Code: |
9023-0 |
| |
Description: |
PCIe 3.0 PHY, UMC 28HPC x1, North/South (vertical) poly orientation |
Name: |
dwc_pcie3phy_umc28hpc_x1ns |
Version: |
1.03b |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
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Application Notes DesignWare® Cores Enterprise 12G PHY ATE Testbench (Doc Version: 1.12a) ( PDF )
DesignWare® Cores High Speed SerDes Custom Clock Grouping (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores High Speed SerDes Gate-Level Simulations (Doc Version: 1.11a) ( PDF | HTML )
DesignWare® Cores PHY – External SRAM Interface and Firmware Loading (Doc Version: 3.00a) ( PDF | HTML )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare® Cores Multi-Protocol 12G One-Lane PHY for UMC 28 HPC Databook (PHY Version 1.03b) ( PDF )
Enterprise 12G PCIe 3.0 PCS for the DesignWare® Cores Enterprise 12G PHY Databook (June 1, 2015) ( PDF )
Enterprise 12G SATA Rate 6G PCS for the DesignWare® Cores Enterprise 12G PHY (June 1, 2015) ( PDF )
Release Notes DesignWare® Cores Enterprise 12G One-Lane PHY for UMC 28HPC Release Notes (PHY Version: 1.03b) ( TXT )
|
Download: |
PCIe-30-PHY_E12_UMC_28HPC_x1 |
Product Code: |
C662-0 |
| |
Description: |
PCIe 3.0 PHY, UMC 28HPC x4, North/South (vertical) poly orientation |
Name: |
dwc_pcie3phy_umc28hpc_x4ns |
Version: |
1.04a |
ECCN: |
5E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes DesignWare® Cores Enterprise 12G PHY ATE Test Bench (Doc Version: 1.10) ( PDF )
SerDes PCB and Packaging Design Guide (Doc Version: 2.40a) ( PDF | HTML )
Databooks DesignWare® Cores Multi-Protocol 12G Four-Lane PHY for UMC 28 HPC Databook (PHY Version: 1.04a) ( PDF )
Enterprise 12G PCIe 3.0 PCS for the DesignWare® Cores Enterprise 12G PHY Databook (June 1, 2015) ( PDF )
Enterprise 12G SATA Rate 6G PCS for the DesignWare® Cores Enterprise 12G PHY (June 1, 2015) ( PDF )
Release Notes DesignWare® Cores Enterprise 12G Four-Lane PHY for UMC 28HPC Release Notes (PHY Version: 1.04a) ( TXT )
|
Download: |
PCIe-30-PHY_E12_UMC_28HPC_x4 |
Product Code: |
D383-0 |