| Description: | Asymmetric Synchronous (Dual-Clock) FIFO with Static Flags |
| Name: | DW_asymfifo_s2_sf |
| Version: | DWBB_202506.3 |
| ECCN: | EAR99/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Building Blocks |
| Overview: | DesignWare Building Block Components |
| Documentation: |
Hide Documents...
Datasheets DWBB DW_asymfifo_s2_sf Datasheet (DWBB_202506.0) ( PDF )DWBB DW_asymfifo_s2_sf Datasheet - showing the latest changes (DWBB_202409.5) ( PDF ) Doc Overview DWBB Memory -- FIFO Overview (DWBB_202506.0) ( PDF )Release Notes DesignWare Building Block IP Release Notes (DWBB_202506.2) ( PDF | HTML )DesignWare Building Block IP Release Notes (DWBB_202506.3) ( PDF ) User Guide DesignWare Building Block IP User Guide (DWBB_202506.2) ( PDF | HTML ) |
| Examples: | Direct Instantiation in Verilog Direct Instantiation in VHDL |