DesignWare Verification IP Quickstart for AMBA 3 AXI: A New View into Documentation
A New View into Documentation
One of the biggest challenges when acquiring verification IP for a verification environment is integrating and using the verification IP.
This can be even more challenging when adopting a new verification IP along with a new verification methodology.
Based on the feedback received from many DesignWare Verification IP customers,
new documentation and examples are now available for the DesignWare AMBA Verification IP v5.20a for the AXI protocol that helps ease the adoption of the verification IP in a SystemVerilog VMM environment.
The Quickstart consists of guidelines and a new SystemVerilog VMM example.
Upon opening the documentation the user is greeted with a top level index, Figure 1, that represents the tasks that
By Jay Hopkins, Manager Tech Pubs
the user will need to proceed through when using the verification IP.
There are also links to a description of the examples that accompany the Quickstart.
Clicking on the example links will take you to a description example.
The first example supplied is a basic example that has the structure shown in Figure 2.
This basic example is comprised of a master model, a slave model and two port monitors.
The DUT in this example is a simple pass-through that allows connection of the master to the slave.
There is also an atomic generator in the test environment that allows for the generation of individual transactions to the master.
The basic example demonstrates the following points:
To see each of these tasks, click on the appropriate box on the index page, Figure 1, and you will be taken to a page relating to that topic.
Each page contains the following information:
- Component instantiation
- Connection to the DUT
- Configuration of the VIP
- Setting transaction constraints
- Generating a directed test
- Setting up a basic atomic generator transaction
- Setting up a response
Figure 3 shows an example of the 'Setting up a Directed Test' page.
- A general description of the task
- Classes used in this particular task
- The steps required to complete the task
- Any hints or tips related to this task
- Related information; basic or advanced
- The directory hierarchy and files used on the right side of the page
There are links on the page that will take you to more detailed information in the documentation.
There are links to the Class Reference documentation, the User's Guide, to the example files and to external sources like SolvNet articles to provide more details on a give subject.
The goal behind this is to make as much information about a given task as accessible as possible to the user.
The basic example is the first example to be delivered with the AXI Verification IP.
There will be two follow-on examples: an intermediate example and an advanced example shown in Figures 4 & 5 respectively.
Each of these examples will show increasingly complex tasks. Tasks like:
The intermediate and advanced examples will be available in future releases of the DesignWare AMBA Verification IP.
The home page for the Quickstart can be found at:
Also, you can go to the documentation overview file, intro.pdf, to find the link to the Quickstart.
If you are a DesignWare Library or VCS Verification Library customer, you can download the DesignWare AMBA Verification IP Suite at:
Other DesignWare Verification IP will incorporate these examples and documentation in future releases.
Please take a look at the AXI Quickstart documentation and examples and tell us what you think.
- Functional coverage
- Scenario generation
- Vmm_subenv usage
- Error injection
- Use of factiories
- Use of callbacks