Choosing the Right Architecture for Analog-to-Digital Conversion in Wireless Broadband Communications AFEs
By Manuel Mota, Technical Marketing Manager, Synopsys Inc.
Most wireless broadband communications systems make use of a zero-IF (intermediate frequency) demodulation scheme for down conversion of the radio frequency signal into baseband frequencies. The outputs of the down-conversion are quadrature (I&Q) modulated analog baseband signals that can be digitized using a dual channel ADC in order to be more effectively processed in the digital baseband processor. Typical ADC resolution for these applications is in the 10 to 12-bit range.
The "over-the-air", radio frequency channel bandwidth for broadband communication protocols, such as WiFi 802.11abg, LTE and WiMAX, can reach 20 MHz (see figure below). The corresponding down-converted, quadrature modulated signals have, each, a bandwidth of up to 10 MHz.
Until recently, ADC converters based on the Pipeline architecture were the most appropriate solution to process such wideband signals with the required resolution. Recent advances in oversampling data converter technology have enabled new alternatives for the definition of the Baseband AFE for wireless broadband communication systems. Their comparative advantages are reviewed in the following sections
Wireless communication protocol evolution (showing RF channel BW)
A Pipeline ADC is made of a cascade of low resolution conversion stages. In each stage the input signal is quantized with low resolution, the resulting conversion error (analog "residue") is amplified by a known value and provided to the next stage for further processing. After the signal "residue" is cascaded through all pipeline stages, the digital output of each stage is concatenated together (after error correction and time alignment) to create the output digital representation of the input signal.
Most of today's high speed applications use Pipeline ADC architectures. Integrated Pipeline ADC converters can achieve sampling rates in excess of 300 MSPS while delivering 10 to 12-bit resolutions.
This range of performance is suitable for most broadband communication protocols and is, therefore, not surprisingly today's broadband communications baseband processor ICs integrate such an ADC in their receive path.
Oversampling Sigma-Delta ADC
Oversampling Sigma-Delta ADCs make use of large oversampling rates and noise-shaping techniques to achieve high resolution in a narrow signal band. In its simplest form, this converter is made of an analog integrator and comparator which create a high speed bit stream whose average represents the input value, followed by a digital decimation filter that reconstructs the low frequency digital signal.
For resolutions above 12-bit, oversampling sigma delta architectures are typically selected. They are the common choice for audio and for sensor interfacing applications as well as for the narrow band communications receive channel. These applications have in common the requirement for a high resolution (13-bit and higher) in a narrow signal frequency band.
Traditionally, oversampling sigma delta ADC converters would only be able to process signals within a band in the range of hundreds of kHz and up to few MHz, making them unsuitable for Broadband Communication applications.
In recent years, however, the technology for ADCs based on oversampling, sigma delta architectures has evolved to the point that wideband Sigma Delta ADCs can be effectively used to convert signals with band up to 10 MHz or more.
This achievement is quite significant because it allows for the use of this ADC architecture in the receive channel of broadband communication interfaces such as LTE, WiMAX or 802.11abg (they are not suited for 802.11n, where the required signal bandwidth is 20 MHz).
Selection Criteria for Broadband Communications Receivers
As shown in the figure below, there is a range of applications for which the wideband Oversampling Sigma Delta ADC is an alternative to the Pipeline ADC. The ability to use either of the two ADC architectures for the broadband communications receiver gives the system developer additional "knobs" to optimize his system, it is therefore important to understand some of the tradeoffs involved in this selection.
Application range for Oversampling Sigma Delta and Pipeline ADC
Baseband processors for cellular handsets are often required to serve multiple protocols. It is often the case that the processor can be configured to serve either a narrow band application such as GSM or a broadband application such as LTE.
Traditionally, the system solution would involve having two separate AFE blocks, one for broadband communications (using a Pipeline ADC architecture) and one for narrow band communications (using an Oversampled Sigma-Delta ADC architecture)
The wideband oversampling converter is the optimal solution for these applications due to its ability to be configured to achieve optimal power dissipation both for narrowband/high resolution modes and wideband/lower resolution modes.
Other applications, such as PC dongles and base stations (Pico cells, etc), that are serving only a single communications protocol, will likely select pipeline converters due to their simplicity of use and support for wider input signal band (adjacent channels can be converted at the same time)
Advanced SoCs for broadband communications integrate the RF transceiver together with the baseband processor. Alternatively, in some cases, the data conversion function is integrated in the RFIC (Radio Frequency Integrated Circuit) and the inter-chip RFIC - BBIC (Base-Band Integrated Circuit) communication is carried out in the digital domain.
In these SoCs, the oversampling and built-in noise shaping proprieties of the sigma delta architecture alleviate the requirements for the analog anti-aliasing filters that are located at the input of the ADC. However, a high frequency sampling clock must be provided (possibly using a PLL).
By reducing the filter order, it is possible to achieve significant power savings at system level.
Block diagram of a fully integrated SoC, including RF transceiver
Traditional system implementations are defined using discrete RF and baseband (BB) ICs. The communication between the two chips is made using quadrature modulated analog baseband signals. This system solution is highly flexible because it allows the same baseband IC to be used together with multiple RFICs.
Discrete RFIC implementations typically include high order filtering functions as part of the analog baseband processing. In those cases the benefits of using oversampling converters in the BBIC are not materialized and pipeline solutions are a better solution for the analog interface due to their simplicity and lower frequency clock requirements.
Block diagram of a discrete RFIC + BBIC system
The advent of the "4G" broadband communication protocols is leading to the convergence between traditional cellular-centric applications using narrowband "2G" and "3G" communication protocols (GSM, HSPDA, etc) and traditional PC-centric applications using broadband WiFi protocols. Both LTE and WiMAX are "4G" protocols and have similar requirements in terms of data converter specifications.
Interestingly, system developers originating from the cellular-centric world tend to select oversampling converters for their "4G" solution, whereas developers originating from the PC-centric world tend to select pipeline converters for their "4G" solution. This highlights an often overlooked selection criteria: legacy and the previous knowledge of the system developer.
In the case of broadband wireless communication applications, a similar range of performance, power dissipation and area can be achieved both by using ADCs based on wideband Oversampling Sigma Delta and Pipeline techniques. The selection criterion is typically based on system level definitions:
In general, the wideband oversampling sigma delta ADC converter will be preferred for
- handset based application that is intended to support both narrowband and broadband communications (up to a signal bandwidth of 10 MHz)
- applications where the ADC is integrated together with the RF transceiver, for example, fully integrated RF+BB chips
Pipeline ADC converter will be preferred for
Appendix: Aliasing and Oversampling
- applications defined to support broadband only (PC-dongles, Pico cells, etc)
- applications where the baseband signal's bandwidth is wider than 10 MHz (for example, 802.11n)
- applications where the RFIC is an external device
When sampling a band limited signal at a given sampling rate Fs, the sampled signal will have images centered at all multiples of Fs. If the original signal has a band wider than Fs/2, then there is some overlap between the signal and its image that is created by the sampling mechanism. This overlap degrades the signal and cannot be recovered. It is called "aliasing".
Left: aliasing effect due to absence of analog filtering
Center: Use of high order antialiasing analog filter
Right: Use of oversampling and low order antialiasing filter
(blue: signal after analog filter, green: image signal, red: aliasing component, Fs: sampling frequency)
In the figures above we show two possible ways of avoiding signal degradation due to aliasing:
- A high order analog filter is used to eliminate any signal over Fs/2. High order analog filters are delicate analog circuits that are costly in terms of area and power dissipation. Integrated analog filters require tuning of its parameters in order to take into account process spreads and environment variations, which adds to their complexity.
- Alternatively, the signal is oversampled. Due to the higher sampling frequency, the signal images are farther away in the spectrum and, therefore, a lower order (and possibly not tuned) analog filter may be used to eliminate aliasing. This option reduces the system cost and power dissipation due to the absence of the high order, tuned, analog filter.