DesignWare IP Prototyping Kits for PCI Express 4.0, 3.1 & 2.1

The DesignWare® IP Prototyping Kits for PCI Express 4.0, PCI Express 3.1 and PCI Express 2.1 center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary SoC integration logic. IP Prototyping Kits are available as soft deliverables requiring various hardware prerequisites such as a HAPS system, cables, and other accessories. All IP kits include reference drivers, SoC integration logic, and application examples.

DesignWare IP Prototyping Kits for PCI Express 2.1 Controllers
DesignWare IP Prototyping Kits for PCI Express 3.1 Controller
DesignWare IP Prototyping Kits for PCI Express 4.0 Controller

 

Highlights
Products
Downloads and Documentation
  • Supports DesignWare PCI Express 4.0, 3.1 or 2.1 Controller
  • Power management, clock and reset control block
  • Pre-instrumented debug for most interfaces
  • IP Prototyping Kits for PCI Express are available in the following configurations:
    • Soft IP Prototyping Kits for use with your in-house HAPS system
      • PCI Express 4.0 Endpoint
      • PCI Express 4.0 Root Complex
      • PCI Express 3.1 Endpoint
      • PCI Express 3.1 Root Complex
      • PCI Express 2.1 Endpoint
      • PCI Express 2.1 Root Complex
Soft Deliverable, IP Prototyping Kit for PCIe Gen2 x1,2,4 End Point on HAPS-80, Xilinx GTH PHY, PCIe connection for PCSTARs Subscribe
Soft Deliverable, IP Prototyping Kit for PCIe Gen2 x1,2,4 Root Complex on HAPS-80, Xilinx GTH PHY, AXI tunnel to ARC SDPSTARs Subscribe
Soft Deliverable, IP Prototyping Kit for PCIe Gen3x1 End Point on HAPS-80, PCIe connection for PCSTARs Subscribe
Soft Deliverable, IP Prototyping Kit for PCIe Gen3 x1,2,4 End Point on HAPS-80, Xilinx GTH PHY, PCIe connection for PCSTARs Subscribe
Soft Deliverable, IP Prototyping Kit for PCIe Gen3x1 Root Complex on HAPS-80, AXI tunnel to ARC SDPSTARs Subscribe
Soft Deliverable, IP Prototyping Kit for PCIe Gen3 x1,2,4 Root Complex on HAPS-80, Xilinx GTH PHY, AXI tunnel to ARC SDPSTARs Subscribe
IP Prototyping Kit for DWC PCIe Gen4x1 Endpoint Controller on HAPS-DX7, 16 Gig PHY card, PCIe connection for PCSTARs Subscribe
IP Prototyping Kit for DWC PCIe Gen4x1 Root Complex Controller on HAPS-DX7, 16 Gig PHY card, AXI tunnel to ARC SDPSTARs Subscribe

Description: IP Prototyping Kit for DWC PCIe Gen4x1 Endpoint Controller on HAPS-DX7, 16 Gig PHY card, PCIe connection for PC
Name: dwipk_dx_pcie4ep_16gphy_pcie
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_PCIe4-EP-16G-PHY_PCIe
Product Code: HW0373-0
  
Description: IP Prototyping Kit for DWC PCIe Gen4x1 Root Complex Controller on HAPS-DX7, 16 Gig PHY card, AXI tunnel to ARC SDP
Name: dwipk_dx_pcie4rc_16gphy_arc
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_PCIe4-RC-16G-PHY_ARC
Product Code: HW0372-0
  
Description: Soft Deliverable, IP Prototyping Kit for PCIe Gen2 x1,2,4 End Point on HAPS-80, Xilinx GTH PHY, PCIe connection for PC
Name: dwcipk_80_pcie2ep_xlnxphy_pcie
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_80_PCIe2-EP-XLNXPHY-PCIe
Product Code: C369-0
  
Description: Soft Deliverable, IP Prototyping Kit for PCIe Gen2 x1,2,4 Root Complex on HAPS-80, Xilinx GTH PHY, AXI tunnel to ARC SDP
Name: dwcipk_80_pcie2rc_xlnxphy_arc
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_80-PCIe2-RC-XLNXPHY-PCIe
Product Code: C368-0
  
Description: Soft Deliverable, IP Prototyping Kit for PCIe Gen3 x1,2,4 End Point on HAPS-80, Xilinx GTH PHY, PCIe connection for PC
Name: dwcipk_80_pcie3ep_xlnxphy_pcie
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_80-PCIe3-EP-XLNXPHY-PCIe
Product Code: C046-0
  
Description: Soft Deliverable, IP Prototyping Kit for PCIe Gen3 x1,2,4 Root Complex on HAPS-80, Xilinx GTH PHY, AXI tunnel to ARC SDP
Name: dwcipk_80_pcie3rc_xlnxphy_arc
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_80-PCIe3-RC-XLNX
Product Code: E027-0
  
Description: Soft Deliverable, IP Prototyping Kit for PCIe Gen3x1 End Point on HAPS-80, PCIe connection for PC
Name: dwcipk_80_pcie3ep_10gphy_pcie
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_80-PCIe3-EP-10GPHY
Product Code: E025-0
  
Description: Soft Deliverable, IP Prototyping Kit for PCIe Gen3x1 Root Complex on HAPS-80, AXI tunnel to ARC SDP
Name: dwcipk_80_pcie3rc_10gphy_arc
Version: 5.40a
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: ipk_80-PCIe3-RC-10GPHY
Product Code: E026-0