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IP DIRECTORY COMPONENT DETAIL

IP Directory Component Detail

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Analog IP Selector

Memory & Logic IP Selector

Description	USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface Supporting HSIC (config. as Device only or Full Speed only)
Name	dwc_usb_2_0_hs_otg_subsystem-ahb
Version	3.30a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Overview	Product Overview Website
Documentation	Show Documents... Hide Documents... Databooks DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Databook DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Databook with Change Bars Datasheet DesignWare USB 2.0 Controller IP Doc Overview DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Documentation Overview Installation Guide DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Installation Guide QuickStart DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) QuickStart Release Notes DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Release Notes Success Stories ChipWrights achieves first-pass silicon success and meets aggressive schedule with … Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success DesignWare Hi-Speed USB 2.0 OTG PHY and Controller IP Shortens austriamicrosystems … High Quality IP Saves Open-Silicon Three Months on Schedule User Manuals DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Programmer's Guide DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Programmer's Guide with … DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) User Guide White Paper Shrinking SoC Design Cycles Using DesignWare Intellectual Property
Toolsets	Qualified Toolsets
Download	dw_iip_DWC_otg
Product Code	3884-0