dwc_usb_2_0_hs_otg_subsystem-ahb
IP Directory Component Detail
| Description: |
USB 2.0 Hi-Speed OTG Controller Subsystem w/AHB Interface Supporting HSIC (config. as Device only or Full Speed only) |
| Name: |
dwc_usb_2_0_hs_otg_subsystem-ahb |
| Version: |
4.30a |
| ECCN: |
5E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Cores |
| Overview: |
Product Overview Website |
| Documentation: |
Hide Documents...
Application Notes Integrating USB 2.0 Hi-Speed On-The-Go Controller and USB 2.0 femtoPHY Application Note ( PDF )
Databooks DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Databook (4.30a) ( PDF | HTML )
DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Databook with Change Bars (4.30a) ( PDF )
Datasheet Synopsys USB 2.0 Controller IP ( PDF )
Installation Guide DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Installation Guide (4.30a) ( PDF )
Programming Guides DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Programming Guide (4.30a) ( PDF | HTML )
DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Programming Guide with Change Bars (4.30a) ( PDF )
Release Notes DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Release Notes (4.30a) ( PDF )
Success Stories ChipWrights achieves first-pass silicon success and meets aggressive schedule with high-quality Synopsys USB and Ethnernet IP ( PDF )
Combination of Tools, IP and Services Help Teradici Achieve First Silicon Success ( PDF )
High Quality IP Saves Open-Silicon Three Months on Schedule ( PDF )
Synopsys Hi-Speed USB 2.0 OTG PHY and Controller IP Shortens austriamicrosystems Project by up to Six Months ( PDF )
User Guides DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) User Guide (4.30a) ( PDF | HTML )
DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) User Guide with Change Bars (4.30a) ( PDF )
White Paper Shrinking SoC Design Cycles Using Synopsys Intellectual Property ( PDF )
|
| Toolsets: |
Qualified Toolsets |
| Download: |
dw_iip_DWC_otg |
| Product Code: |
3884-0 |
