dwc_comp_ts12n0zs1p11sadcl01ms
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IP Directory Component Detail
| Description: |
Single Port High Density and Performance Leakage Control SRAM 1M Sync Compiler, TSMC 12nm FFC+ ULL Standard Vt |
| Name: |
dwc_comp_ts12n0zs1p11sadcl01ms |
| Version: |
a04p2 |
| ECCN: |
3E991/NLR |
| STARs: |
Open and/or Closed STARs |
| myDesignWare: |
Subscribe for Notifications |
| Product Type: |
DesignWare Foundry Sponsored IP |
| Documentation: |
Hide Documents...
Application Notes 16nm and Smaller Geometries Memory Compilers IP UPF Support ( PDF )
FRAM plugin usage ( PDF )
NDM Plugin User Guide ( PDF )
Synopsys Memory Compilers Verilog User Guide ( PDF )
TEST_RNM test mode ( PDF )
TSMC 12nm Memory Compiler Read Margin and Assist Settings ( PDF )
TSMC 12nm Memory Compiler Redundancy and BIST Features ( PDF )
TSMC 12nm Memory Compilers Power Modes ( PDF )
TSMC 12nm Memory Compilers SoC Integration Guidelines ( PDF )
Integration Review Checklist Synopsys Memory Compilers Integration Review Checklist ( EXCEL )
QuickStart Embed-It! Integrator Quick Start Guide ( PDF )
Release Notes Single Port High Density and Performance Leakage Control SRAM 1M Sync Compiler For TSMC 12nm FFC+ ULL Standard Vt Process - Release Notes ( TEXT )
User Guide Single Port High Density and Performance Leakage Control SRAM 1M Sync Compiler For TSMC 12nm FFC+ ULL Standard Vt Process - User Guide ( PDF )
|
| Download: |
v-comp_ts12n0zs1p11sadcl01ms |
| Product Code: |
F798-0 |
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