| Description: | Single Port Ultra High Density SRAM 1.2M Sync Compiler For TSMC N2P Process |
| Name: | dwc_comp_ts02p0g01p11sadul1m2s |
| Version: | a02p1 |
| ECCN: | 3E991/NLR |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Embedded Memory IP |
| Documentation: |
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Application Notes Synopsys Memory Compilers Verilog User Guide ( PDF )TSMC N2P Memory Compilers Power Modes ( PDF ) TSMC N2P Memory Compilers Read Margin and Assist Settings ( PDF ) TSMC N2P Memory Compilers Redundancy and BIST Features ( PDF ) Implementation Guide TSMC N2 Memory Compilers tCIC cip variables script ( TEXT )Release Notes Single Port Ultra High Density SRAM 1.2M Sync Compiler For TSMC N2P Process - Release Notes ( TEXT )User Guide Single Port Ultra High Density SRAM 1.2M Sync Compiler For TSMC N2P Process - User Guide ( PDF ) |
| Download: | v-comp_ts02p0g01p11sadul1m2s |