- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Software Integrity
- Tools & Services
- Integrations
- Solutions
- Training
- Customers
- Resources
- Partners
- Blog
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers & Culture
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Silicon Design & Verification
< Solutions
< Solutions
Cloud
Synopsys in the Cloud
< Solutions
< Solutions
< Solutions
< Solutions
Photonic Solutions
RSoft Photonic Device Tools
Photonic System Tools
PIC Design Software
OptoCompiler
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compilers
Duet Packages
HPC Design Kit
PVT Sensors
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Software Integrity
< Tools & Services
< Tools & Services
< Tools & Services
< Software Integrity
Integrations
< Solutions
< Solutions
< Solutions
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Software Integrity
Customers
< Resources
< Resources
< Software Integrity
< Software Integrity
Partners
< Software Integrity
Blog
< main menu
Software Integrity
Software Integrity
+
Tools & Services
Integrations
+
Solutions
+
Training
Customers
+
Resources
Partners
Blog
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers & Culture
< About Us
Careers & Culture
Careers
< main menu
DesignWare USB-C 3.1 Controller IP
Synopsys provides designers with silicon-proven, configurable DesignWare® USB 3.1 Type-C Controllers that are compliant with the USB-Implementers Forum (USB-IF) USB 3.1 specification and support Type-C connectivity. The DesignWare USB 3.1 controllers provide the lowest possible gate count, efficient power management optimized with dual power rails and PIPE and UTMI/UTMI+ interfaces for PHYs. This comprehensive solution also includes support for Dual Role Device (DRD), xHCI Host, Device, and Hub Controllers and SuperSpeed InterChip (SSIC), High Speed InterChip (HSIC), and OTG2/OTG3 features. Together, these elements accelerate development of advanced chip designs delivering video, data and power over a single USB Type-C connector.
DesignWare USB 3.1 Type-C Controller IP offers the flexibility required for high-volume, fast turnaround consumer applications. Configuration options maximize SoC design performance and minimize CPU interrupts, while flexible parameters enable easy integration into low- and high-latency systems.
DesignWare USB Controller IP has shipped in over one billion units for leading electronics companies worldwide. Using DesignWare USB IP significantly reduces development time and engineering risk, bringing USB-based SoCs to market faster.
DesignWare USB IP is the most certified IP solution in the industry. With over 3,000 design wins, Synopsys' complete USB IP solution--consisting of controllers, PHYs, verification IP, drivers, and IP prototypes--enables designers to lower integration risk and speed time-to-market.
DesignWare IP Prototyping Kits DesignWare SuperSpeed USB 3.1 IP Solution DesignWare USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution IP Accelerated Initiative Brochure
Highlights
Products
Downloads and Documentation
- Lowest risk: Based on proven USB 3.0 controller shipped in 100s of millions of units
- Lowest power: Extend battery life in mobile devices (USB power saving modes, Uniform Power Format, hibernation option with dual power rails)
- Configurable data buffering options to optimize performance vs area
- Supports all USB speed modes
- Host, Device, and Dual Role Device controllers meet the needs for all markets
| Description: | SuperSpeed USB 3.1 Device Controller |
| Name: | dwc_usb_3_1_device |
| Version: | 1.90a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: |
Hide Documents... Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide ( HTML | PDF ) Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change … ( PDF ) Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF ) DesignWare USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution ( PDF ) Doc Overview Designware Cores Enhanced SuperSpeed USB 3.1 Controller Document Overview (1.90a) ( PDF ) Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (1.90a) ( PDF ) Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with … ( PDF ) Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (1.90a) ( PDF ) User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change … ( PDF ) White Papers Addressing Three Critical Challenges of USB Type-C Implementation ( PDF ) USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF ) USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF ) |
| Toolsets: | Qualified Toolsets |
| Download: | USB3.1-Device |
| Product Code: | A868-0 |
| Description: | SuperSpeed USB 3.1 DRD Controller |
| Name: | dwc_usb_3_1_drd |
| Version: | 1.90a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: |
Hide Documents... Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide ( HTML | PDF ) Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change … ( PDF ) Datasheets DesignWare SuperSpeed USB 3.1 IP Solution ( PDF ) DesignWare USB-C 3.1/DisplayPort 1.4 TX IP Complete Solution ( PDF ) Doc Overview Designware Cores Enhanced SuperSpeed USB 3.1 Controller Document Overview (1.90a) ( PDF ) Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (1.90a) ( PDF ) Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with … ( PDF ) Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (1.90a) ( PDF ) User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change … ( PDF ) White Papers Addressing Three Critical Challenges of USB Type-C Implementation ( PDF ) USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF ) USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF ) |
| Toolsets: | Qualified Toolsets |
| Download: | USB3.1-Device |
| Product Code: | A871-0 |
| Description: | SuperSpeed USB 3.1 Host Controller |
| Name: | dwc_usb_3_1_host |
| Version: | 1.90a |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: |
Hide Documents... Application Notes DesignWare Cores USB3.1 SSP PHY and Controller Integration Guide ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Simulation Debug Guide ( HTML | PDF ) Databooks Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Databook - with Change … ( PDF ) Datasheet DesignWare SuperSpeed USB 3.1 IP Solution ( PDF ) Doc Overview Designware Cores Enhanced SuperSpeed USB 3.1 Controller Document Overview (1.90a) ( PDF ) Installation Guide Designware Cores Enhanced SuperSpeed USB 3.1 Controller Installation Guide (1.90a) ( PDF ) Programming Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller Programming Guide - with … ( PDF ) Release Notes Designware Cores Enhanced SuperSpeed USB 3.1 Controller Release Notes (1.90a) ( PDF ) User Guides Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide (1.90a) ( PDF | HTML ) Designware Cores Enhanced SuperSpeed USB 3.1 Controller User Guide - with Change … ( PDF ) White Papers USB 3.2: A USB Type-C Challenge for SoC Designers ( PDF ) USB 3.2: The Latest USB Type-C Challenge for SoC Designers ( PDF ) |
| Toolsets: | Qualified Toolsets |
| Download: | USB3.1-Device |
| Product Code: | A869-0, A870-0, A872-0 |