Using Verilator for Processor Benchmarking of Automotive SoC Platforms

Bosch presents a flow to efficiently evaluate processor cores in automotive SoC architectures. Bosch overcame the limited availability of accurate processor models by using Verilator to translate processor RTL. The resulting SystemC model is easily imported into Platform Architect for SoC-level design space exploration. 

A case study demonstrates the flow of importing the verilated open-source CVA6 RISC-V core into a system-level automotive SoC architecture using Synopsys Platform Architect. Bosch shows that accurate performance evaluation with minimal cycle-count deviation and easy integration is achieved.