Accelerate IC Layout Parasitic Analysis with ParagonX

Kopal drives product development, innovation, and customer engagement. With close to 20 years of experience in electronic design automation (EDA) and IC design, she has contributed across the entire design and verification spectrum—from IC design and verification to software architecture and development to product strategy and delivery.Before joining Synopsys, Kopal spent a decade at an EDA startup, where she played a key role in developing and managing product lines from concept to market. Prior to that, she had worked as a design engineer at NXP Semiconductors and ST Microelectronics.

Kopal holds a Master’s degree in Integrated Electronic System Design from Chalmers University of Technology in Sweden.

Rob Dohanyos leads the charge on product development and customer innovation for the Diakopto product line and its flagship tool, ParagonX. With nearly 20 years of hands-on experience in the semiconductor industry—working across a vast spectrum of technology nodes, from 0.8um to 2nm—Rob offers a unique, real-user point of view. This practical background, honed through a career that included a successful transition from the field to a mature EDA startup (later acquired by Ansys), helps ensure that the Diakopto group of tools directly addresses the most critical needs of today's chip designers.