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Synopsys and TSMC Discuss Multi-Die Monitoring, Embedded Test & Repair Flows

Date: Jan 22, 2026 | 9:00 AM PST

Featured Speakers:

  • Dr. Yervant Zorian , Chief Architect and Fellow at Synopsys, President of Synopsys Armenia
  • Dr. Sandeep K Goel, Senior Director, TSMC

Our upcoming Synopsys webinar features an exciting real-world case study showcasing Synopsys IP and EDA tools with UCIe-based chiplets on advanced TSMC silicon and packaging technologies. See firsthand the silicon proof points for complete die-to-die interconnects, embedded memory, and logic monitoring, test, and repair.

Discover how 2.5D and 3D multi-die designs transform high-performance computing and AI. This webinar explores key challenges of monitoring, embedded test and repair for multi-die designs, including essential pre-stack and post-stack manufacturing flows, in-field health monitoring, and the role of the 3Dblox language (under IEEE P3537 Standardization) in enabling EDA tool interoperability. Learn about practical Silicon Lifecycle Management solutions that optimize quality, yield, reliability and manufacturing cost across advanced packaging configurations.

What You Will Learn:

  • Silicon proof points for monitoring, test, and repair across advanced packaging configurations
  • Key embedded test & repair flows for multi-die designs
  • In-silicon health monitoring solutions for silicon lifecycle management
  • Practical test cost minimization strategies for multi-die solutions

Register Now!

Featured Speakers

Dr. Yervant Zorian
Chief Architect, Synopsys
Dr. Yervant Zorian is a chief architect and fellow at Synopsys, as well as president of Synopsys Armenia. Yervant holds 35 U.S. patents, has authored four books, published over 350 refereed papers, and received numerous best paper awards. He received an M.S. degree in Computer Engineering from the University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from the Wharton School of Business, University of Pennsylvania.

Dr. Sandeep K Goel
Senior Director, TSMC
Dr. Sandeep K Goel is an academician and senior director at Taiwan Semiconductor Manufacturing Company (TSMC), USA. He previously held research and management roles at LSI, Magma Design Automation, and Philips Research. Dr. Goel earned his M.Tech. in VLSI from IIT Delhi in 1999 and his Ph.D. in Electrical and Computer Engineering from the University of Twente in 2005. He has co-authored multiple book chapters, published over 90 conference/journal papers, and holds more than 100 US patents. He received the Most Significant Paper Award at ITC in 2010 and the Distinguished Contributor Award from the IEEE Computer Society in 2022. He is the chair of IEEE Std. P3537 standard for 3Dblox: Chiplet connectivity and physical properties description language. His research focuses on design verification, testing, diagnosis, and defect modeling of 2D/3D SOCs.