NoC Design and Platform Integration for Early Benchmarking of Automotive Processor SoCs

Automotive SoC teams face a critical challenge: validating performance and design parameters before silicon—without accurate benchmarking, costly respins and delayed time-to-market become inevitable.

ST demonstrates their proven architectural exploration flow for the StellarApp SoC, leveraging Platform Architect and LPDDR5 models to enable fast, multi-abstraction simulation with third-party IP integration and comprehensive HW/SW analysis.

 

What You'll Learn:

  • Assemble and integrate multi-abstraction models from ARM, Arteris, and other IP vendors
  • Accelerate design exploration through rapid parameter sweeping and simulation cycles
  • Analyze SoC performance from both hardware and software perspectives simultaneously
  • Validate automotive benchmarks using accurate LPDDR5 memory controller models
  • Eliminate late-stage design risks through early architectural validation
 

Watch On-Demand

Featured Speakers

Filippo Colaninno

ST

Ask BETA This experience is in beta mode. Please double check responses for accuracy.

End Chat

Closing this window clears your chat history and ends your session. Are you sure you want to end this chat?