Synopsys XSR PHY IP Datasheet

Struggling to meet soaring bandwidth and power demands in your next multi-die design? Download the Synopsys XSR PHY IP datasheet and discover how to deliver ultra-low latency, energy-efficient die-to-die connectivity.

What You Will Learn:

• Discover how to achieve up to 112Gbps per lane with robust NRZ and PAM-4 signaling
• Learn to maximize bandwidth and minimize area with flexible 16-lane macros on any die edge
• See how advanced clock-forwarded architecture slashes power and jitter