Synopsys XBC/XHC OTP NVM IP – SLP_A Architecture Datasheet

The Synopsys XBC/XHC One‑Time Programmable (OTP) NVM IP based on the SLP_A architecture provides a secure, silicon‑proven non‑volatile memory solution optimized for fast reads and low power operation in SoC designs. Built on a patented antifuse bitcell that requires no additional masks or process steps, this hard‑macro OTP IP delivers intrinsic security, long‑term data retention, and flexible integration options, making it a cost‑effective alternative to mask ROM, eFuses, and Flash for permanent data storage.

What You Will Learn:

• How antifuse‑based OTP memory provides intrinsic security that is resistant to visual and physical inspection
• How flexible memory configurations from 1 Kbit to 256 Kbit support a wide range of non‑volatile storage needs
• How single‑supply 5 V I/O operation and optional integrated power supply simplify system power integration