- All Products
- Software Integrity
- Semiconductor IP
- Verification
- Design
- Silicon Engineering
- Application Security Services
- Dynamic Analysis (DAST)
- Mobile Application Security
- Penetration Testing
- Managed Static Analysis
- All Services
- Software Security
- Silicon Design
- Community
- About Us
< All Products
< All Products
< All Products
< All Products
< All Products
< All Products
< overview
All Products
+ Software Integrity + Semiconductor IP + Verification + Design + Silicon Engineering + Optical Solutions< Software Integrity
< Software Integrity
Application Security Services
Dynamic Analysis (DAST) Mobile Application Security Penetration Testing Managed Static Analysis< Software Integrity
< Software Integrity
< Software Integrity
Blog
< Software Integrity
Support
< overview
Software Integrity
+ Application Security Products + Application Security Services + Resources + Training & Education Blog Support< Semiconductor IP
< Semiconductor IP
Memories & Libraries
Logic Libraries Memory Compliers Duet Packages HPC Design Kit Embedded Test & Repair Non-Volatile Memory< Semiconductor IP
< Semiconductor IP
Processor Solutions
ARC Processors Embedded Vision Processors Development Tools Operating Systems Ecosystems ASIP Tools< Semiconductor IP
< Semiconductor IP
< Semiconductor IP
< Semiconductor IP
< Semiconductor IP
< overview
< Verification
< Verification
< Verification
< Design
< Design
< Design
< overview
< Silicon Engineering
< overview
< main menu
< Solutions
< Solutions
Industry Solutions
Automotive Cloud Computing Financial Services Industrial Controls Systems Healthcare Mobile Devices< Solutions
< overview
< All Services
< All Services
< All Services
< overview
< Software Security
Software Security Professional Services
Embedded Software Testing Insider Threat Detection Red Teaming Secure Coding Guidelines Software Architecture & Design Thick Client Testing< Software Security
Managed Services
< Software Security
Program Development & Design
Maturity Model (BSIMM) Maturity Action Plan (MAP) Policies & Standards Security Metrics Software Security-in-a-Box< Software Security
< Software Security
Support
< overview
< Silicon Design
< Silicon Design
< Silicon Design
< Silicon Design
< main menu
< Community
< Community
< Community
< Community
Interoperability
ARC Access HAPS Connect HSPICE Integrator In-Sync System-Level Catalyst TAP-in VC Apps Access< Community
< Community
< Community
< overview
Community
+ Community + SNUG + Partners + Interoperability + Academic Programs + Company Blogs + BSIMM< About Us
< About Us
< About Us
< About Us
< About Us
DesignWare SD/eMMC PHY IP
To address today’s content capacity and bandwidth requirements, JEDEC and SD Association continue to define new functionality and enhancements for embedded mass-storage flash memory (eMMC) and removable flash memory card (SD Card), targeting a range of applications.
The DesignWare® SD/eMMC PHY IP, compliant with the latest JEDEC and SD specifications, is a fully integrated hard macro with high-speed IOs and Delay Locked Loop (DLL)/delay lines. Optimized for power and area, the PHY IP is fully verified and configurable for easy integration into application processors. The PHY IP and DesignWare SD/eMMC Host Controller IP offer a fully verified solution that designers can use to integrate the latest embedded and removable memory functionality into their application processor, while speeding time-to-market.
DesignWare SD/eMMC PHY IP Datasheet
Highlights
Products
Downloads and Documentation
- Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
- Fully integrated hard macro with high speed IOs and DLL/delay lines
- Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
- Easy to integrate with the highly optimized Synopsys DesignWare SD/eMMC Host Controller IP, providing a complete low risk solution
- Optimized for area
- Scalable and low pin count solution
- Ultra-low-power operation
| Description: | SD/eMMC - TSMC 16FFC, North/South Poly Orientation |
| Name: | dwc_sd_emmc_tsmc16ffc |
| Version: | 1.01b |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | SD30-eMMC5x_TSMC_16FFC |
| Product Code: | C188-0 |
| Description: | SD/eMMC - TSMC 16FFPGL, North/South Poly Orientation |
| Name: | dwc_sd_emmc_tsmc16ffpgl |
| Version: | 1.01b |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | SD30-eMMC5x_TSMC_16FFPGL |
| Product Code: | C187-0 |
| Description: | SD/eMMC - TSMC 16FFPLL, North/South Poly Orientation |
| Name: | dwc_sd_emmc_tsmc16ffpll |
| Version: | 1.01b |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | SD30-eMMC5x_TSMC_16FFPLL |
| Product Code: | C186-0 |