DW_ram_2r_w_s_lat

IP Directory Component Detail

Description: Synchronous Write-Port, Asynchronous Dual Read-Port RAM (Latch-Based)
Name: DW_ram_2r_w_s_lat
Version: DWBB_201612.3
STARs: Open and/or Closed STARs
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Product Type: DesignWare Building Blocks
Overview: DesignWare Building Block Components
Documentation:
Examples: Direct Instantiation in Verilog
Direct Instantiation in VHDL