Description: | Synchronous Write-Port, Asynchronous Dual Read-Port RAM (Flip-Flop Based) |
Name: | DW_ram_2r_w_s_dff |
Version: | DWBB_201709.4 |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Building Blocks |
Overview: | DesignWare Building Block Components |
Documentation: |
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Examples: | Direct Instantiation in Verilog Direct Instantiation in VHDL |