EDA
System
IP
SolvNetPlus
Training & Education
SNUG India - 2020 Proceedings
Complete Proceedings
2020 SNUG India - Award Winners for Best Presentation
IC Implementation
Visual Computation SoC Physical Implementation Challenges and Recipe to Achieve Best PPA
IC Implementation
Fusion Based Methodology to Target Peak IR-Drop Reduction Throughout the Implementation Cycle
IC Verification
Shift Left Verification - Using VCS Partition Compile (PC) and Fine Grained Parallelism (FGP)