Date: Jan 28, 2026
Time: 9:00AM TST | 10:00AM KST/PST
Featured Speakers:
The Synopsys TCAD Seminar is a premier event designed to bring together leading experts, researchers, and engineers from across the semiconductor industry to explore the latest advancements in Technology Computer-Aided Design (TCAD). This seminar serves as a dynamic platform for sharing cutting-edge developments in process and device simulation, design technology co-optimization (DTCO), and AI-accelerated workflows that are shaping the future of semiconductor innovation.
Attendees will gain deep insights into how TCAD enables the design of next-generation devices such as SiC and GaN power electronics, advanced CMOS nodes, quantum technologies, and 3D packaging solutions. With a strong focus on the rapidly growing markets in Asia, the seminar highlights region-specific challenges and opportunities, including the acceleration of EV adoption, energy efficiency demands, and emerging foundry ecosystems.
Through technical presentations and collaborative discussions, participants will discover how Synopsys TCAD solutions—from Sentaurus Process and Device to AI-based calibration and GPU acceleration—empower faster, more accurate R&D cycles and deliver higher ROI.
Whether you are a device engineer, process technologist, or product strategist, the Synopsys TCAD Seminar offers a unique opportunity to connect with industry leaders, explore transformative innovations, and position your organization at the forefront of semiconductor technology.
| Time | Title | Topics |
| 10:00 AM – 10:30 AM Japan/Korea 09:00 AM – 09:30 AM Taiwan |
Industry Trends and TCAD Roadmap by Shela Aboud |
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| 10:30 AM – 11:00 AM Japan/Korea 09:30 AM – 10:00 AM Taiwan |
Presentation by Vanguard International Semiconductor Corporation (VIS) by Wei-Chih Cheng |
Electro-Thermal Evaluation of Packaged VDMOS Using Sentaurus TCAD |
| 11:00 AM – 11:30 AM Japan/Korea 10:00 AM – 10:30 AM Taiwan |
The Future of Advanced Logic Scaling by Plamen Asenov |
DTCO, CFET: Reliability/variability |
| 11:30 AM – 12:00 PM Japan/Korea 10:30 AM – 11:00 AM Taiwan |
Innovation in Memory: DRAM, Stacking, and Integration by Xi-Wei Lin |
Next Gen DRAM - 4F2 double-gate VCT modeling; HBM/GPU package thermal analysis; Al-doped HfO2 3D FeNAND simulation |
| 12:00 PM – 12:30 PM Japan/Korea 11:00 AM – 11:30 AM Taiwan |
A “How-To Guide” to Reduce Calibration Cycle Time by Jinhyeok Ryu |
|
| 12:30 PM – 1:00 PM Japan/Korea 11:30 AM – 12:00 PM Taiwan |
Advances in Power Electronics Devices by Ricardo Borges |
WBG Solutions, Power termination design, Success Story: IGBT |
| 1:00 PM – 1:30 PM Japan/Korea 12:00 PM – 12:30 PM Taiwan |
New Solutions in TCAD for Manufacturing by Xi-Wei Lin |
S-Topo and Process Explorer new feature updates |
Jinhyeok Ryu is a Staff Engineer at Synopsys, developing ML-based surrogate models and calibration methods for TCAD. He holds a PhD in Physics from DGIST with deep expertise in computational science, non-Hermitian physics, and ML
Section Manager in the Device Team, Vanguard International Corporation
Wei-Chih Cheng has been with Vanguard International Corporation since 2022 and currently is a Section Manager in the Device Team (Device Design & Development Department). His work focuses on device design and TCAD model development for power MOSFETs, BCD technologies, and GaN HEMTs. He received his PhD in Electronic and Computer Engineering from the Hong Kong University of Science and Technology in 2021. He is also an Associate Member of the Institute of Physics (IOP).