Verification Videos
UPF Signoff Using Design Independent Checker
With increasing SoC complexity, growing design sizes and advanced power-aware architectures, early and efficient static low power verification is essential to reduce turnaround times and enable faster time to market. UPF and design development goes hand in hand, but schedules may vary. It is difficult to verify the accuracy and correctness of the UPF (both semantically and syntactically) without the design being available. There are many UPF issues which can be caught independent of the design with the new design independent UPF checker. This Synopsys webinar will showcase the latest capabilities for UPF sign-off using the VC UPF methodology.
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