Verification Debug Datasheet Download

Verdi Performance Analyzer

Performance is a critical source of competitive advantage for modern SoCs, and performance targets needs to be verified on top of functionality. Given the multitude of ways SoCs can be configured — different IP and interconnect topologies, number of masters and slaves, bus widths, packet sizes, clock speeds etc., performance verification quickly gets overwhelming. Given SoC performance verification is often done towards the end of the project cycle, there is a pressing need for push-button performance analysis and debug.

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