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Training & Education
Left-Shift Performance Verification of Multi-Die Auto SoCs Using Architectural Models
As automotive SoCs become increasingly complex with multi-die architectures, identifying performance bottlenecks late in the design cycle can create costly delays and increased development risk. Renesas presents how Synopsys Platform Architect enables shift-left performance modeling, helping engineering teams evaluate workloads, optimize architectures, and detect system bottlenecks months before RTL is available.
What You Will Learn
- How Renesas uses shift-left performance verification to identify and resolve multi-die SoC bottlenecks early, improving architectural confidence and reducing downstream design risk.
- How Platform Architect accelerates architectural exploration through realistic system models, automated platform generation, workload-driven analysis, and custom performance monitoring.
- How early performance modeling improves automotive SoC development outcomes by delivering 20–25× faster analysis, approximately 90% accuracy, and enabling comprehensive evaluation of ADAS and multi-die workloads before implementation.
Watch On-Demand
Featured Speakers
Tanya Bansal
Renesas
Abhishek Singh
Renesas
Manish Rai
Renesas
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