Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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Achieving Seamless 1.6 Tbps Interoperability for High BW HPC AI/ML SoCs
Featured Speakers:
- Madhumita Sanyal, Sr. Staff Product Manager, Synopsys
- Matt Burns, Global Director, Technical Marketing, Samtec
Why You Should Watch On-Demand:
- Explore 1.6 Tbps Ethernet Interoperability: Gain insights into the latest challenges and solutions for achieving seamless1.6 Tbps Ethernet interoperability in HPC, AI, and ML SoCs
- Understand 224G SerDes Innovations: Learn about the advancements in224G SerDes architecture enabling high-speed, low-latency data transmission over long distances.
- See Real-World Interoperability Testing: Discover the importance of rigorous interoperability testing, including plug fests and compliance characterization, for robust system performance.
- Stay Up to Date on Evolving Standards: Get an overview of the growing 1.6T Ethernet ecosystem and how evolving standards are shaping next-generation high-bandwidth systems.
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Featured Speakers
Sr. Staff Product Manager, Synopsys
Madhumita Sanyal is a senior satff technical product manager for the high-speed SerDes PHY IP portfolio for the Synopsys Solutions Group. She has over 17 years of experience in design and application of ASIC WLAN products, logic libraries, embedded memories, and mixed-signal IP. Madhumita holds an M.S. in electrical engineering from San Jose State University and completed the LEAD program at Stanford University.
Matt Burns
Global Director, Technical Marketing, Samtec
Matthew Burns develops go-to-market strategies for Samtec’s Silicon-to-Silicon solutions. Over the course of 25 years, he has been a leader in design, applications engineering, technical sales and marketing in the telecommunications, medical and electronic components industries. He currently serves as Secretary at PICMG. Mr. Burns holds a B.S. in Electrical Engineering from Penn State University.