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Synopsys XBC/XHC OTP NVM IP – SLP_B Architecture Datasheet
The Synopsys XBC/XHC One‑Time Programmable (OTP) NVM IP based on the SLP_B architecture provides a secure, silicon‑proven non‑volatile memory solution for SoC designs that require reliable, low‑power permanent storage without additional process steps. Built on a patented antifuse bitcell mechanism, this hard‑macro OTP IP delivers intrinsic security, long‑term data retention, and flexible integration options, making it a cost‑effective alternative to mask ROM, eFuses, and Flash for a wide range of applications including configuration data, calibration, security keys, and boot code storage.
What You Will Learn:
- How antifuse‑based OTP architecture provides intrinsic, tamper‑resistant security at the bitcell level
- How flexible memory configurations from 1Kbit to 256Kbit support both small and large non‑volatile storage needs
- How optional integrated power supply and multiple voltage options simplify system integration and reduce BOM cost
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