Standards-Compliant 112G PHY for Linear Optics: Driving Efficient AI Infrastructure 

Linear optics are emerging as the path forward for scaling AI interconnects beyond 800G — eliminating DSP and retimer overhead inside optical modules to reduce system power, latency, and thermal burden. To make this scalable, the industry needs standards-based compliance. Synopsys has developed the industry's first 112G PHY IP compliant with the OIF-CEI-112G-LINEAR-PAM4 specification, with measured transmitter and receiver results meeting and in several cases exceeding the standard. Download the whitepaper to see the full characterization data and what it means for the next generation of AI infrastructure.

What you'll learn:

• Why linear optics matter now — How shifting signal conditioning from the optical module to the host SerDes cuts up to 50% of module power, reduces latency, and lowers thermal burden in dense AI racks
• What OIF-CEI-112G-LINEAR-PAM4 standardizes — Common electrical limits, reference test points, and compliance methods that turn linear from a fragile, vendor-specific implementation into a repeatable, interoperable ecosystem 
• How Synopsys 112G PHY performs against the spec — Transmitter VMA, jitter, and eye-closure results across temperature corners, plus receiver jitter tolerance (JTOL) under realistic channel impairments — meeting and in several cases exceeding CEI limits 
• What this unlocks for AI infrastructure — A production-ready, standards-based path to DSP-less host-to-module connectivity, scalable from 800G/1.6T today toward 224G and 448G linear tomorrow, and a bridge to co-packaged optics (CPO)