Unlocking PPA Benefits of Backside Routing

Power delivery networks compete with signal routing for limited metal layers, creating congestion and increasing IR drop in advanced nodes. Unlocking PPA benefits of backside routing eliminates this competition by moving the PDN to the substrate's backside, freeing frontside resources for logic while reducing voltage drop and enabling smaller standard cells with nano-TSVs.

What You'll Learn:

• Identify how backside PDN architecture separates power and signal layers to reduce IR drop and fabrication complexity
• Optimize logic density through increased pin access points and reduced placement obstructions enabled by backside power delivery
• Improve routing efficiency with higher wire density on upper metal layers and reduced congestion on lower signal layers
• Implement backside PDN designs using enhanced PG creation, multi-voltage support, and integrated extraction in Fusion Compiler
• Explore future functional backside capabilities including critical signal routing and backside device integration for maximum PPA gains