New Metrics and New Scale in Computational Lithography

As process nodes grow more complex, edge-placement and CD metrics alone are increasingly difficult to reconcile with observed defectivity, variability, and process-window behavior. Progress on this appears to depend on two things together: formulations that describe patterning more completely, and the computational scale to run them on production timelines.

Why Attend

  • Move past EPE-only thinking — defectivity-aware, process-window, and topology-based cost functions that balance competing manufacturing goals.
  • Measure what CD and registration miss — contour-based EPE analysis for curvilinear patterns, variation classification, OPC/ILT correction quality, and overlay.
  • See the GPU payoff in production terms — faster turnaround, lower cost of ownership, and scalability for rigorous 3D and ML-enabled modeling.
  • Get ahead on agentic AI — Knowledge Assistants and Mask Space Optimization that accelerate recipe generation, troubleshooting, and deployment.
 

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Meet the Speakers

Presenter NameTitle / CompanyAbout
Dr. Larry MelvinSr. Director of Technical Product Management at SynopsysLarry Melvin is Sr. Director of Technical Product Management at Synopsys, with a career that spans X‑ray lithography research, fab‑level photolithography engineering, and advanced OPC and modeling. His current work focuses on mask modeling, high‑NA EUV, AR/VR, stochastics, and next‑generation digital‑twin data flows that improve performance and yield. Larry’s current passion is developing technology to help chip design and manufacturing interact to improve yield, performance, and area.
Thuc DamSr. Director of Applications EngineeringThuc Dam holds a PhD in applied organic chemistry from UTD.  He has worked in semiconductor field for 24 years with 30+ publications and 2 patents, and has previously been employed in technical and managerial roles at Intel and Luminescent Inc.  His innovations in mask process development, ILT, SMO, and DRE have contributed extensively to the computational lithography domain.  He is growing his experience in DTCO, AR/VR and EUV.  He is currently the Sr Director of Applications Engineering for the ILT, PLRC & SMO groups at Synopsys.​
Brian WardPrincipal Engineer and Technical Product Manager at SynopsysBrian Ward is a Principal Engineer and Technical Product Manager for AI and Agentic Systems at Synopsys. With more than 20 years of experience in computational lithography, modeling, metrology, OPC, and ILT, he now leads AI strategy across the Mask Solutions portfolio, focusing on Knowledge Assistants, Workflow Assistants, and Agentic AI technologies that help semiconductor engineers automate complex workflows and accelerate innovation. He holds B.S. and M.S. degrees in Electrical Engineering from The University of Texas at Austin.
Germain FengerSr. Director of Product Management at SynopsysGermain Fenger is a Sr. Director of Product Management at Synopsys, where he leads advanced mask solutions and computational lithography technologies. With a background spanning semiconductor manufacturing, lithography research, engineering, and product leadership, Germain has held roles at imec, GlobalFoundries, Mentor Graphics, Siemens EDA, and Synopsys. He holds a Ph.D. in Microsystems, has authored more than 80 publications, and holds multiple patents in the field.
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