- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Silicon Design & Verification
< Solutions
< Solutions
< Solutions
Cloud
Synopsys in the Cloud
< Solutions
< Solutions
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compilers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Polaris Platform
Comprehensive application security from developer to deployment
< Software Integrity
< Software Integrity
< Software Integrity
Professional Services
Strategy and programs that address security before, during and after development
< Software Integrity
< Tools
< Tools
< Tools
< Tools
< Software Integrity
< Services
Managed Security Testing
Managed SAST
Dynamic Analysis (DAST)
Penetration Testing
Mobile Application Security Testing
Network Security Testing
< Services
Professional Services
Strategy and Planning
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Services
< Software Integrity
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Solutions
< Solutions
< Resources
< Resources
< Software Integrity
< Software Integrity
Customers
< Partners
< Partners
Become a partner
< Software Integrity
< Software Integrity
Blog
< main menu
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers
< About Us
Careers
Careers
< main menu
Synopsys DesignWare SATA AHCI Host IP
Synopsys DesignWare® IP for Serial ATA (SATA) Host with the Advanced Host Controller Interface (AHCI) supports 1.5, 3 and 6Gb/sec transfer speeds as defined by the SATA v3.3 (backwards compatible to SATA 2.6), the AHCI 1.3, and SATA PIPE v4.3 specifications. To ease system level integration, the DesignWare SATA Host IP solution has an AMBA 2.0 AHB, an AMBA 3 AXI and an AMBA 4 AXI interface which extends the AHCI benefits to embedded system-on-chip (SoC) designs. The DesignWare SATA AHCI core IP has been fully verified with the industry-standard AHCI software drivers provided as part of the Linux® and Windows Vista™ operating systems. The DesignWare SATA AHCI IP solution has passed the SATA-IO Building Block Interoperability Testing, the golden standard of compliance to the SATA Specification.
The AHCI standard programming interface reduces custom platform software driver creation reducing the overall time from prototype to production. The DesignWare SATA digital host controller supports Asynchronous Notifications, Native Command Queuing (NCQ), Streaming NCQ and enables optimization for performance applications with up to 8 ports at a time. With its integrated DMA, high-speed operation is achieved without system overhead. Reduced gate count and very low power consumption is achieved by utilizing the set of highly configurable options which enable the core to be optimized based on the exact design requirements. The test environment for the digital host controller IP includes the DesignWare Verification IP, which enables SATA transactions generation, SATA protocol monitoring and AMBA subsystem transaction generation. Verilog-based tests are provided as examples to accelerate system integration.You can view all Synopsys SATA videos here.
DesignWare SATA Complete Solution Datasheet
|
|
Highlights
Products
Downloads and Documentation
- supports 1.5, 3 & 6 Gbps SATA operations
- Compliant with SATA/eSATA v3.3, AHCI v1.3 and SATA PIPE v4.3 specifications
- AMBA 2.0 AHB and AMBA 3 AXI subsystem interfaces
- AMBA 4 AXI and ACE-Lite bus interfaces
- Memory data protection and memory address parity protection
- Supports ATA/TAPI-7 specification
- Supports power management features
- Supports BIST loop-back modes
- Supports up to 8 SATA devices per controller (configurable from 1 to 8 ports)
- Native command queuing, streaming, and asynchronous notification
- Port multiplier support with both command-based switch (CBS) and FIS-based switching (FBS)
- Optional mechanical presence switch, cold presence detect, and activity LED support
- Runs latest version of Windows or Linux AHCI software drivers “out of box”
- SATA-IO Building Block Interoperability Tested