Synopsys’ DesignWare® Controller IP for Bluetooth low energy, Thread, and Zigbee delivers secure, concurrent wireless connectivity for Internet of Things (IoT) applications such as wearables, industrial, smart homes, and smart cities. The controller incorporates advanced data encryption and random number generation for secure wireless connections, and allows multiple simultaneous connections between supported protocols in a single instantiation. It also provides validated interoperability with software stacks through a physical or a virtual Host Controller Interface (HCI).
The IP is delivered as RTL and firmware corresponding to an optimized IP partition to minimize system power dissipation and allow for functionality upgrades through software updates. The firmware runs on an external processor that can either be a dedicated processor or host processor. The controller is thoroughly tested and qualified in accordance with the Bluetooth Special Interest Group (SIG) and Thread Group procedures, and is compliant with the Zigbee specification. Integrating IP that adheres to industry standards enables designers to deliver energy-efficient IoT SoCs with less risk and accelerated time-to-market.
With the complete DesignWare IP solution, years of analog and RF design experience, and a broad portfolio of silicon-proven IP shipping in volume, Synopsys provides a robust wireless IP solution ready for integration into advanced SoC designs.
DesignWare Controller IP for Bluetooth, Thread, and Zigbee Datasheet
DesignWare PHY IP for Bluetooth, Thread, and Zigbee Datasheet
Downloads and Documentation
- Compliant with the Bluetooth 5.1, Bluetooth mesh, Thread, and Zigbee specifications
- Optimized for power, area and memory footprint
- Integrates Bluetooth 5.1 Link Layer and IEEE 802.15.4 Media Access Control (MAC)
- Shares resources including memory and combo fabric for area optimization
- Concurrent wireless connectivity between Bluetooth low energy, Thread, and Zigbee networks
- All required security functions including advanced data encryption and random number generation
- HCI layer for interoperability with software stacks
- Configurable number of concurrent connections
- Smart hardware and firmware partitioning for optimal power and area
- Direct test mode access
- Includes design and verification environment