Synopsys IDE Security IP Module for PCI Express 5.0

PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers to their use in consumer electronics. PCI Express links carry high value information between the host and the peripheral and from endpoint to endpoint.

The Synopsys Integrity and Data Encryption (IDE) Security IP Module for PCIe 5.0 provides confidentiality, integrity, and replay protection against hardware-level attacks. IDE adds optional capabilities for PCIe devices to perform hardware encryption and integrity checking on packets transferred across PCIe links.

The Synopsys IDE Security Module for PCIe 5.0 offers seamless integration with the Synopsys Controller for PCIe 5.0 via the Transaction Layer Packets (TLP) interface as defined in the PCI-SIG IDE specification. This interface matches the data width used by the controller e.g., 512-bit or 256-bit, together with the maximum number of TLP prefixes to offer an optimal performance vs. area implementation.

The IDE extended capability registers are accessible from the Synopsys Controllers for PCIe 5.0, offering a clear view of the link capabilities during discovery and configuration timeframes.

Interoperability between the Synopsys IDE Security Module and Controller for PCIe 5.0 is part of the development process, offering customers version compatibility and reference integration templates.

Synopsys IDE Security IP Module for PCI Express 5.0 Datasheet