Synopsys Controller IP for PCI Express 7.0

The configurable and scalable Synopsys Controller IP for PCI Express® (PCIe®) 7.0 supports all required features of the PCI Express 7.0 specification, and can be configured by the user to support Endpoint (EP), Root Port, Dual Mode (DM), or Switch Port (SW) applications. The low-latency controller with MultiStream architecture allows a full 128GT/s x16 lane bandwidth with support for up to 1024-bit data paths, while enabling timing closure at 1GHz and 2GHz. The controller can ensure optimal flow with multiple sources and in multi-virtual channel implementations. Support for host, device, and dual mode enables early interoperability in absence of available 7.0 hosts and interop partners. Designers can achieve maximum throughput for Arm-based SoCs with the controller’s support for the Arm AXI and for advanced host features including deferrable memory writes. The controller's reliability, availability and serviceability (RAS) features enhance data integrity, simplify firmware development and improve link bring-up.

Synopsys Controller IP for PCI Express 7.0

 

Highlights
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Downloads and Documentation
  • Supports all required features of the PCI Express 7.0 (128 GT/s) specification
  • Allows a full 128GT/s x16 lane bandwidth with up to 1024-bit data path implementations
  • Supports advanced RAS data protection features including ECC
  • Advanced RAS-DES features for simplified bring-up and debug
  • Supports the Synopsys native interface or the optional Arm® AMBA® 5/4/3 AXI application interface
  • Configurable for low power, small area and low latency
  • Enables efficient embedded DMA applications with Synopsys HyperDMA™
  • Standards-compliant Integrity and Data Encryption (IDE) Security Module protects data transfers over PCIe 7.0 interfaces
  • TDISP support for PCIe for SR-IOV and hardware security via IDE
  • New vectored interface for Switch Port controllers optimizes dataflow
  • Supports Arm Confidential Compute Architecture (CCA) Host TEE
PCIe Controller Without HPC Features (Gen6 and Gen7)STARs Subscribe
PCIe Controller With HPC Features (Gen5 and Above)STARs Subscribe
Description: PCIe Controller With HPC Features (Gen5 and Above)
Name: dwc_pcie_ctl_adv_hpc
Version: 6.40a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_adv
Product Code: G168-0, H476-0, H477-0
Description: PCIe Controller Without HPC Features (Gen6 and Gen7)
Name: dwc_pcie_ctl_adv
Version: 6.40a-lca01
ECCN: 5E991/NLR
STARs: Open and/or Closed STARs
myDesignWare: Subscribe for Notifications
Product Type: DesignWare Cores
Documentation:
Download: dw_iip_DWC_pcie_ctl_adv
Product Code: G166-0, G167-0, G169-0, H782-0