Synopsys LPDDR5X/5/4X Controller is a next generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs.
The controller connects to the Synopsys LPDDR5X/5/4X PHY or other LPDDR5X/5/4X PHYs via the DFI 5.0 interface to create a complete memory interface solution. The Synopsys LPDDR5X/5/4X Controller includes software configuration registers, which are accessed through an AMBA 3.0 APB interface.
The LPDDR controller block includes the advanced command scheduler, memory protocol handler, optional inline ECC (Error-correcting code), and dual channel support, as well as the DFI interface to the PHY.
Synopsys LPDDR5X/5/4X Controller IP Datasheet
Downloads and Documentation
- Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
- Multiport Arm® AMBA® interface (AXI™4 / AXI™ 3) with managed QoS or single-port host interface to the DDR controller
- DFI 5.0 compliant interface to Synopsys LPDDR5X/5/4X PHY and other LPDDR5X/5/4X PHYs
- Best in class performance with unique features such as QoS based scheduling, inline ECC, and dual-channel support
- High-bandwidth design with up to 64 CAM entries for reads and 64 CAM entries for writes; latency as low as 8 clock cycles
- UVM testbench with embedded assertions and options to incorporate a LPDDR5X/5/4X PHY into a verification environment
|LPDDR Controller supporting LPDDR5X, LPDDR5, and LPDDR4X||STARs
|LPDDR Controller supporting LPDDR5X, LPDDR5 and LPDDR4X with Advanced Features Package||STARs