Synopsys LPDDR5/4/4X Controller is a next-generation controller optimized for power, latency, bandwidth, and area, supporting JEDEC standard LPDDR5, LPDDR4, and LPDDR4X SDRAMs. The controller connects to the Synopsys LPDDR5/4/4X PHY or other LPDDR5/4/4X PHY via the DFI 5.0 interface to create a complete memory interface solution. The Synopsys LPDDR5/4/4X Controller includes software configuration registers, which are accessed through an AMBA 3.0 APB interface.
The LPDDR controller block includes the advanced command scheduler, memory protocol handler, optional inline ECC (Error-correcting code), and dual-channel support, as well as the DFI interface to the PHY. The Synopsys Controller seamlessly integrates with the Synopsys Inline Memory Encryption (IME)
Security Module to provide confidentiality of data in-use or stored in off-chip memory.
Synopsys LPDDR5/4/4X Controller IP Datasheet
Downloads and Documentation
- Supports JEDEC standard LPDDR5, LPDDR4, and LPDDR4X SDRAMs
- Multiport Arm® AMBA® interface (4 AXI™/3 AXI™) with managed QoS or single-port host interface to the DDR controller
- DFI 5.0 compliant interface to Synopsys LPDDR5/4/4X PHY and other LPDDR5/4/4X PHYs
- Best-in-class performance with unique features such as QoS-based scheduling, inline ECC, and dual-channel support
- High-bandwidth design with up to 64 CAM entries for reads and 64 CAM entries for writes; latency as low as 8 clock cycles
- UVM testbench with embedded assertions and options to incorporate an LPDDR5/4/4X PHY into a verification environment
- Integrated with Synopsys IME Security Module for data confidentiality
|LPDDR Controller supporting LPDDR5, LPDDR4 and LPDDR4X for automotive applications||STARs
|LPDDR Controller supporting LPDDR5, LPDDR4, and LPDDR4X||STARs
|LPDDR Controller supporting LPDDR5, LPDDR4 and LPDDR4X with Advanced Features Package||STARs