DesignWare XGMAC - 10 Gigabit Ethernet MAC

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Synopsys XGMAC DesignWare® Core (DWC) is compliant with the IEEE 802.3ae specification. It interfaces to the PHY layer through the XGMII interface, and to the system through a FIFO interface. It is a highly configurable and eases SoC integration which allows it to tailor its feature set to the target application supporting speeds of 1G, 2.5G or 10G. The XGMAC can be integrated with the DWC Ethernet PCS and the DWC XAUI PHY cores from Synopsys to provide a complete 10 Gigabit Ethernet solution.

DesignWare 10 Gigabit Ethernet IP Complete Solution Datasheet
DesignWare XGMAC 10G Ethernet MAC Datasheet

General Features
  • Supports IEEE 802.3az Energy Efficient Ethernet
  • Fully compliant IEEE 802.3ae XGMII interface to communicate with an external XGMII PHY
  • Supports IEEE 802.3ae Annex 31B flow-control
  • Supports VLAN tag processing in compliance with IEEE 802.1Q standard
  • IPv4/6 Header Checksum processing for Transmit and Receive
  • TCP/UDP/ICMP Checksum insertion and processing for Transmit and Receive
  • Complete Network statistics (optional) with RMON/MIB counters (RFC2819/RFC2665)
  • Advanced power management features
  • Configurable for 1G, 2.5G or 10G speeds
PHY Interface Features
  • Support for XGMII interface at double clock rate or data-width
  • Support for GMII interface for 1G configurations
  • Transmit pace rate (programmable) i.e. IPG adjustment to match MAC to PHY rates to SONET /SDH rates
  • Local link fault detection and remote fault transmission and detection
System Interface Features
  • Native FIFO interface for minimal latency
  • Supports 64-bit or 128-bit data interface
  • Configurable Big Endian and Little Endian support
10 Gigabit Ethernet MACSTARsSubscribe

  Description 10 Gigabit Ethernet MAC
  Name dwc_ether_xgmac
  Version 2.00a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Toolsets Qualified Toolsets
  Download dwc_iip_ether_xgmac
  Product Code 3976-0