The Synopsys 25G Ethernet MAC IP is designed for 1/2.5/5/10/25G Ethernet applications. It can be configured as MAC only, with a FIFO interface on the transmit and receive side or with an Arm® AMBA® AXI interface. Management Register access can be configured to use the AMBA APB or AMBA AXI slave interfaces. The IP includes Hyper DMA with up to 128/256 channels. The MAC IP provides a 25G Media-Independent Interface (XGMII) for communication with a corresponding PHY in 2.5/5/10/25G modes and a GMII interface in 1G mode. Also provided is a MDIO controller interface capable of addressing IEEE 802.3 compliant MDIO devices. Synopsys provides a complete, silicon-proven 25G Ethernet solution consisting of controllers, PHYs and verification IP. The cores are proven in various end applications ranging from automotive, networking, compute, and consumer.
Synopsys 25G Ethernet MAC IP Datasheet
Description: | 25 Gigabit Ethernet MAC |
Name: | dwc_ether_25gmac |
Version: | 4.00a-lca00 |
ECCN: | 5E991/NLR |
STARs: | Open and/or Closed STARs |
myDesignWare: | Subscribe for Notifications |
Product Type: | DesignWare Cores |
Documentation: | |
Toolsets: | Qualified Toolsets |
Download: | dw_iip_DWC_25gmac |
Product Code: | H255-0 |